FPGA implementation of a large-number multiplier for fully homomorphic encryption

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2013, Pages 2589-2592

  Wang, Wei ^a   Huang, Xinming ^a  

^a WORCESTER POLYTECHNIC INSTITUTE   (United States)

Author keywords

FPGA; Fully Homomorphic Encryption; Large number Modular Multiplication

Indexed keywords

ARBITRARY FUNCTIONS; ARCHITECTURE DESIGNS; FPGA IMPLEMENTATIONS; FULLY HOMOMORPHIC ENCRYPTION; GENERAL PURPOSE PROCESSORS; LOWER-POWER CONSUMPTION; MODULAR MULTIPLICATION; STRASSEN'S ALGORITHM;

ALGORITHMS; FAST FOURIER TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENERAL PURPOSE COMPUTERS; SECURITY OF DATA;

CRYPTOGRAPHY;

EID: 84883410029     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2013.6572408     Document Type: Conference Paper

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