A 22nm high performance embedded DRAM SoC technology featuring tri-gate transistors and MIMCAP COB

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2013, Pages

  Brain, R ^a   Baran, A ^a   Bisnik, N ^a   Chen, H P ^a   Choi, S J ^a   Chugh, A ^a   Fradkin, M ^a   Glassman, T ^a   Hamzaoglu, F ^a   Hoggan, E ^a   Jahan, R ^a   Jamil, M ^a   Jan, C H ^a   Jopling, J ^a   Kan, H ^a   Kasim, R ^a   Kirby, S ^a   Lahiri, S ^a   Lee, B C ^a   Lenski, D ^a   Limb, J ^a   Lindert, N ^a   Musorrafiti, M ^a   Neulinger, J ^a   Rockford, L ^a   Park, J ^a   Singh, K ^a   Staus, C ^a   Steigerwald, J ^a   Turkot, B ^a   Vandervoorn, P ^a   Venkatesan, R ^a   Wu, S ^a   Yeh, J Y ^a   Wang, Y ^a   Zhang, Z ^a   Zhang, K ^a   more..

^a INTEL CORPORATION   (United States)

Author keywords

22nm; DRAM; embedded; interconnect; MIM; performance

Indexed keywords

22NM; EMBEDDED; INTERCONNECT; MIM; PERFORMANCE;

ASPECT RATIO; CAPACITORS; DYNAMIC RANDOM ACCESS STORAGE; LOGIC DEVICES; METAL INSULATOR BOUNDARIES; TECHNOLOGY; TRANSISTORS;

MIM DEVICES;

EID: 84883366263     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. C.-H. Jan et al, IEDM 2012 Tech. Dig., pp 44-47, 2012
2. C. Auth et al, VLSI Symp. Tech., pp 131-132, 2012.
3. D. Ingerly et al, IITC Proceedings, 2012.