System scaling and collaborative open innovation

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2013, Pages

  Sun, Jack Y C ^a  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

3DIC; CMOS; computing power; scaling; system optimization; VLSI

Indexed keywords

3DIC; COMPUTING POWER; SCALING; SYSTEM OPTIMIZATIONS; VLSI;

APPROXIMATION THEORY; CMOS INTEGRATED CIRCUITS; ELECTRONIC EQUIPMENT MANUFACTURE; ELECTRONICS INDUSTRY; ENERGY EFFICIENCY; INNOVATION; NANOELECTRONICS; OPTIMIZATION; SILICON; SILICON WAFERS; THREE DIMENSIONAL; USER INTERFACES;

DISTRIBUTED COMPUTER SYSTEMS;

EID: 84883352491     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (57)

1. G. Moore, Electronics, vol. 38, no. 8, p.114 (Apr. 1965)
2. R. Dennard, IEEE J. Solid-State Circuits, vol.9, no.5, pp. 256-268 (Oct. 1974)
3. S. Ito et al., IEDM, pp.247-250, (2000)
4. F. Ootsuka et al., IEDM, pp.575-578, (2000)
5. K. Ota et al., IEDM, pp.27-30, (2002)
6. S. Thompson et al., IEDM, pp.61-64, (2002)
7. C. H. Chen, et al., VLSI Tech. Symp., p. 56, (2004).
8. S. K.H. Fung et al., Symposium on VLSI Technology, p.92 (2004)
9. H.C.-H Wang et al., IEDM, pp.3.3.1-4, (2006)
10. K. Mistry et al., IEDM Tech. Dig., p. 274 (2007)
11. H.T. Huang et al., IEDM Tech. Dig., pp. 285-288 (2007)
12. S.H. Yang et al., CICC, pp.1-5, (2011)
13. D. Hisamoto et al., IEDM, pp. 1032-1034 (1998)
14. X. Huang et al., IEDM Technical Digest, pp.67-70 (1999)
15. D. Hisamoto et al., IEEE Transactions on Electron Devices, Vol. 47, No. 12, pp.2320-2325 (2000)
16. C. Y. Chang, et al., IEDM, p.293 (2009)
17. C.C. Wu, et al., IEDM, p. 600 (2010)
18. C.-C. Yeh et al., IEDM Tech. Dig., p.772 (2010)
19. C.-H. Jan et al., IEDM, pp.3.1.1-3.1.4, (2012)
20. Dewey et al., IEDM Tech. Dig., pp.1-4 (2009)
21. M. Passlack, et al., VLSI Technology, p.155 (2010)
22. M. V. Fischetti et al., Journal of Applied Physics, vol.80, no.4, pp.2234-2252 (Aug 1996)
23. R. Zhang et al., IEEE Transactions on Electron Devices, vol.60, no.3, pp.927-934 (March 2013)
24. M. val Dal, et al., IEDM Tech. Dig., p. 521 (2012)
25. M. Radosavljevic et al., IEDM, pp.33.1.1-33.1.4, (2011)
26. F.L. Yang et al., IEDM, pp.255-258 (2002)
27. F.L. Yang et al., Symposium on VLSI Technology, p.196 (2004)
28. A. Kranti et al., Proceedings of the European Solid-State Device Research Conference, pp.357-360 (2010)
29. P. Razavi et al., 12th International Conference on Ultimate Integration on Silicon, pp.1-3 (2011)
30. D.-L. Kwong et al., J. of Nanotechnology, vol. 2012, art. 492121, (2011)
31. T. Ernst et al., IEDM Tech. Dig., pp.1-4 (2006)
32. W. Y. Choi et al., IEEE Electron Device Lett., vol. 28, pp. 743-745 (Aug. 2007)
33. E. Gnani et al., 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp.1227-1230 (2010)
34. A.S. Verhulst et al., Journal of Applied Physics, vol.110, no.2, pp.024510-024510 (Jul 2011)
35. G. Dewey et al., IEDM Tech. Dig., pp.33.6.1-33.6.4 (2011)
36. Q. Huang et al., IEDM Tech. Dig., p. 8.5.1-8.5.4 (2012)
37. L. Lattanzio et al., IEEE Electron Device Letters, vol.33, no.2, pp.167-169 (Feb. 2012)
38. X. Wang et al., IEDM, pp.5.4.1-5.4.4, (2011)
39. V.V. Zhirnov et al., Proceedings of the IEEE, vol.91, no.11, pp.1934-1939, (Nov 2003)
40. I. Zutic et al., Rev. Mod. Phys., vol. 76, no. 2, pp. 323-410 (Apr.-Jun. 2004)
41. H. Dery, P. Dalal, L. Cywinski, and L. J. Sham, Nature, vol. 447, no. 7144, pp. 573-576 (May 2007)
42. B. Behin-Aein et al., Device Research Conference (DRC), pp.41-42 (21-23 June 2010)
43. H. Dery et al., IEEE Transactions on Electron Devices, vol.59, no.1, pp.259-262 ( Jan. 2012)
44. G. Zorpette, IEEE Spectrum, vol.38, no.12, pp.30-35 (Dec 2001)
45. A.P. Chandrakasan et al., IEEE Journal of Solid-State Circuits, vol.27, no.4, pp.473-484 (April 1992)
46. E. Lindholm et al., IEEE Micro, pp. 39-55 (March/April 2008)
47. J.Y.-C. Sun, ISSCC Plenary Round Table, (2011)
48. J.Y. Chen, IEDM, pp.1-6 (2009)
49. C.H. Diaz et al., Symposium on VLSI Technology, pp.11,12, (1999)
50. K.K. Young et al., IEDM, pp.563,566, (2000)
51. TSMC 20nm node, internal publication.
52. S.Y.Hou, Keynote, ICEP-IAAC, (2012)
53. C.H. Yu, Keynote, ISSM (2012)
54. S.Y. Chiang, Keynote, SPIE Advanced Lithography, (2011)
55. T.Lo et al., IEDM Tech. Dig., p.793 (2012)
56. H.B.Chang et al., VLSI, p.173 (2012)
57. W.C.Chiou et al., VLSI, p.107 (2012)