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Volumn , Issue , 2004, Pages 239-246
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Balancing clarity and efficiency in typed feature logic through delaying
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTATION THEORY;
COMPUTER CIRCUITS;
LOGIC PROGRAMMING;
COMPUTATIONAL COSTS;
DESIGN DECISIONS;
GENERALISATION;
LOGIC-PROGRAMMING;
RESOURCE GRAMMARS;
SIMPLE++;
TYPED FEATURE LOGIC;
EFFICIENCY;
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EID: 84882891831
PISSN: 0736587X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (24)
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References (20)
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