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Volumn 1482, Issue , 1998, Pages 525-529

Generating layouts for self-implementing modules

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN;

EID: 84882479935     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0055294     Document Type: Conference Paper
Times cited : (8)

References (7)
  • 1
    • 0008425588 scopus 로고
    • Shortening the Design Cycle for Programmable Logic Devices
    • December
    • Steven Kelem and Jorge Seidel. Shortening the Design Cycle for Programmable Logic Devices. IEEE Design & Test of Computers, December 1992.
    • (1992) IEEE Design & Test of Computers
    • Kelem, S.1    Seidel, J.2
  • 3
    • 84956861824 scopus 로고    scopus 로고
    • PAM-Blox: High Performance FPGA Design for Adaptive Computing
    • Napa, CA
    • O. Mencer, M. Morf, and M.J. Flynn. PAM-Blox: High Performance FPGA Design for Adaptive Computing. FCCM 1998, Napa, CA.
    • FCCM 1998
    • Mencer, O.1    Morf, M.2    Flynn, M.J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.