Optimizing virtual machine scheduling in NUMA multicore systems

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2013, Pages 306-317

  Rao, Jia ^a   Wang, Kun ^b   Zhou, Xiaobo ^a   Xu, Cheng Zhong ^b  

^a University of Colorado Colorado Springs   (United States)

^b Wayne State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PERFORMANCE; NON UNIFORM MEMORY ACCESS; PROGRAM PERFORMANCE; RUN-TIME VARIATIONS; SCHEDULING PROBLEM; SYSTEM LEVEL OPTIMIZATION; VIRTUAL MACHINE MONITORS; VIRTUAL MACHINE SCHEDULING;

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; HARDWARE; MACHINERY; SCHEDULING; SUPERCOMPUTERS;

OPTIMIZATION;

EID: 84880278905     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCA.2013.6522328     Document Type: Conference Paper

References (42)

1. http://blog.xen.org/index.php/2012/04/23/xen-4-2-cpupools/.
2. Q. Ali, V. Kiriansky, J. Simons, and P. Zaroo, "Performance evaluation of HPC benchmarks on VMware's ESXi server," in Proc. of ICPP, 2011.
3. D. H. Bailey, E. Barszcz, J. T. Barton, D. S. Browning, R. L. Carter, L. Dagum, R. A. Fatoohi, P. O. Frederickson, T. A. Lasinski, R. S. Schreiber, H. D. Simon, V. Venkatakrishnan, and S. K. Weeratunga, "The nas parallel benchmarks-summary and preliminary results," in Proc. of SC, 1991.
4. M. Banikazemi, D. Poff, and B. Abali, "PAM: A novel performance/power aware meta-scheduler for multi-core systems," in Proc. of SC, 2008.
5. F. Bellosa and M. Steckermeier, "The performance implications of locality information usage in shared-memory multiprocessors," J. Parallel Distrib. Comput., vol. 37, no. 1, 1996.
6. T. L. Blackwell, "Applications of randomness in system performance measurement," Ph.D. dissertation, 1998.
7. S. Blagodurov, S. Zhuravlev, and A. Fedorova, "Contention-aware scheduling on multicore systems," ACM Trans. Comput. Syst., vol. 28, no. 4, 2010.
8. S. Blagodurov, S. Zhuravlev, A. Fedorova, and A. Kamali, "A case for NUMA-aware contention management on multicore systems," in Proc. of USENIX ATC, 2011.
9. D. Chandra, F. Guo, S. Kim, and Y. Solihin, "Predicting inter-thread cache contention on a chip multi-processor architecture," in Proc. of HPCA, 2005.
10. U. Drepper, "What every programmer should know about memory," 2007.
11. E. Ebrahimi, C. J. Lee, O. Mutlu, and Y. N. Patt, "Fairness via source throttling: A configurable and high-performance fairness substrate for multi-core memory systems," in Proc. of ASPLOS, 2010.
12. M. Ferdman, A. Adileh, O. Kocberber, S. Volos, M. Alisafaee, D. Jevdjic, C. Kaynak, A. D. Popescu, A. Ailamaki, and B. Falsafi, "Clearing the clouds: A study of emerging scale-out workloads on modern hardware," in Proc. of ASPLOS, 2012.
13. A. Gulati, G. Shanmuganathan, A. Holler, and I. Ahmad, "Cloudscale resource management: Challenges and techniques," in Proc. of HotCloud, 2011.
14. F. Guo and Y. Solihin, "A framework for providing quality of service in chip multi-processors," in Proc. of MICRO, 2007.
15. J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative Approach, 5th ed. Morgan Kaufmann Publishers Inc., 2011.
16. Intel Corporation, Intel 64 and IA-32 Architectures Software Developer's Manual, December 2009.
17. Intel VTune Amplifier XE Performance Profiler., http://software.intel. com/en-us/articles/intel-vtune-amplifier-xe/.
18. R. Iyer, L. Zhao, F. Guo, R. Illikkal, S. Makineni, D. Newell, Y. Solihin, L. Hsu, and S. Reinhardt, "QoS policy and architecture for cache/memory in cmp platforms," in Proc. of SIGMETRICS, 2007.
19. R. Knauerhase, P. Brett, B. Hohlt, T. Li, and S. Hahn, "Using OS observations to improve performance in multicore systems," IEEE Micro, vol. 28, 2008.
20. D. Koufaty, D. Reddy, and S. Hahn, "Bias scheduling in heterogeneous multi-core architectures," in Proc. of EuroSys, 2010.
21. D. Kroft, "Lockup-free instruction fetch/prefetch cache organization," in Proc. of ISCA, 1981.
22. P. Lama and X. Zhou, "NINEPIN: Non-invasive and energy efficient performance isolation in virtualized servers," in Proc. of DSN, 2012.
23. D. Levinthal, Performance Analysis Guide for Intel Core i7 Processor and IntelXeon 5500 processors, 2009.
24. T. Li, D. Baumberger, and S. Hahn, "Efficient and scalable multiprocessor fair scheduling using distributed weighted round-robin," in Proc. of PPoPP, 2009.
25. F. Liu and Y. Solihin, "Studying the impact of hardware prefetching and bandwidth partitioning in chip-multiprocessors," in Proc. of SIGMETRICS, 2011.
26. Z. Majo and T. Gross, "Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead," in Proc. of ISMM, 2010.
27. Z. Majo and T. Gross, "Memory system performance in a NUMA multicore multiprocessor," in Proc. of SYSTOR, 2011.
28. Z. Majo and T. Gross, "Matching memory access patterns and data placement for numa systems," in Proc. of CGO, 2012.
29. A. Merkel, J. Stoess, and F. Bellosa, "Resource-conscious scheduling for energy efficiency on multicore processors," in Proc. of EuroSys, 2010.
30. O. Mutlu and T. Moscibroda, "Stall-time fair memory access scheduling for chip multiprocessors," in Proc. of MICRO, 2007.
31. R. Nikolaev and G. Back, "Perfctr-xen: A framework for performance counter virtualization," in Proc. of VEE, 2011.
32. M. K. Qureshi, D. N. Lynch, O. Mutlu, and Y. N. Patt, "A case for MLP-Aware cache replacement," in Proc. of ISCA, 2006.
33. D. Rao and K. Schwan, "vNUMA-mgr: Managing vm memory on numa platforms," in Proc. of HiPC, 2010.
34. A. Snavely and D. M. Tullsen, "Symbiotic jobscheduling for a simultaneous multithreaded processor," in Proc. of ASPLOS, 2000.
35. D. Tam, R. Azimi, and M. Stumm, "Thread clustering: sharing-aware scheduling on smp-cmp-smt multiprocessors," in Proc. of EuroSys, 2007.
36. L. Tang, J. Mars, N. Vachharajani, R. Hundt, and M. L. Soffa, "The impact of memory subsystem resource sharing on datacenter applications," in Proc. of ISCA, 2011.
37. The SPEC CPU2006 Benchmarks., http://www.spec.org/cpu2006/.
38. R. Thekkath and S. J. Eggers, "Impact of sharing-based thread placement on multithreaded architectures," in Proc. of ISCA, 1994.
39. Q. Yi, "Automated programmable control and parameterization of compiler optimizations," in Proc. CGO, 2011.
40. E. Z. Zhang, Y. Jiang, and X. Shen, "Does cache sharing on modern CMP matter to the performance of contemporary multithreaded programs?" in Proc. of PPoPP, 2010.
41. S. Zhuravlev, S. Blagodurov, and A. Fedorova, "Addressing shared resource contention in multicore processors via scheduling." in Proc. ASPLOS, 2010.
42. S. Zhuravlev, J. Saez C., , S. Blagodurov, A. Fedorova, and M. Prieto, "Survey of scheduling techniques for addressing shared resources in multicore processors," ACM Computing Surveys, vol. 45, no. 1, 2013.