Electronic devices architectures for the NANO-CMOS era-from ultimate CMOS scaling to beyond CMOS devices

Electronic Device Architectures for the Nano-CMOS Era: From Ultimate CMOS Scaling to Beyond CMOS Devices

Volumn , Issue , 2008, Pages

  Deleonibus, Simon ^a  

^a CEA LETI   (France)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84880187455     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.4032/9789814241298     Document Type: Editorial

References (4)

1. J. Kilby and E. Keonjian, IEDM Proceedings of Technical Digest, pp. 76-78, Washington (DC), Oct 29-30, (1959).
2. G. Moore, Electronics, Volume 38, 8, April 19, 1965.
3. R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, Bassous E and A. R LeBlanc, IEEE J Solid-State Circ, 9(5), 256-68, 1974.
4. G. Baccarani, M. R. Wordeman and R. H. Dennard, IEEE Trans Electron Devices, 31(4), 452-62, 1984.