The effect of elevated temperature on latchup and bit errors in CMOS devices

IEEE Transactions on Nuclear Science

Volumn 33, Issue 6, 1986, Pages 1605-1609

  Kolasinski, W A ^a   Koga, R ^a   Schnauss, E ^a   Duffey, J ^b  

^a AEROSPACE CORPORATION   (United States)

^b RAYTHEON COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84879464186     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/TNS.1986.4334649     Document Type: Article

References (8)

1. M. S. Cooper, J. P. Retzler and G. C. Messenger, “High Temperature Schottky TTL Latchup”, IEEE Trans. on Nucl. Sci., NS-25, No. 6, 1538 (1978).
2. W. J. Stapor, R. L. Johnson Jr., M. A. Xapsos, K. W. Fernald, A. B. Campbell, B. L. Bhuva and S. E. Diehl, “Single Event Upset Dependence on Temperature for an NMOS/Resistive-Load Static Ram”, IEEE Trans. on Nucl. Sci. NS-33, No. 6 (1986).
3. W. A. Kolasinski, J. B. Blake, J. K. Anthony, W. E. Price and E. C. Smith “Simulation of Cosmic-Ray Induced Soft Errors and Latchup in Integrated Circuit Computer Memories”, IEEE Trans. on Nucl. Sci., NS-26, No. 6, 5087 (1979).
4. D. K. Nichols, W. E. Price, and C. J. Malone, “Single Event Upset (SEU) of Semiconductor Devices - A Summary of JPL Test Data”, IEEE Trans. on Nucl. Sci., NS-30, No. 6, 4520 (1983).
5. R. Koga and W. A. Kolasinski, “Heavy Ion-Induced Single Event Upsets of Microcircuits: A Summary of The Aerospace Corporation Test Data”, IEEE Trans. on Nucl. Sci., NS-31, No. 6, 1190 (1984).
6. M. Shoga and D. Binder, “Theory of Temperature Effect on Single Event Latchup”, Paper presented at the Fourth Annual DNA-DOE-NASA Symposium on Single Event Effects, Los Angles, CA, 8–8 April, 1986.
7. S. E. Diehl, A. Ochoa Jr., P. V. Dressendorfer, R. Koga and W. A. Kolasinski, “Error Analysis and Prevention of Cosmic Ion-Induced Soft Errors in Static RAM's”, IEEE Trans. on Nucl. Sci., NS-29, No. 6, 2032 (1982).
8. A. R. Knudson and A. B. Campbell, “Investigation of Soft Upsets in Integrated Circuit Memories and Charge Collection in Semiconductor Test Structures By the Use of an Ion Microbeam”, Nucl. Instr. and Methods 218, 625 (1983).