The McPAT framework for multicore and manycore architectures: Simultaneously modeling power, area, and timing

Transactions on Architecture and Code Optimization

Volumn 10, Issue 1, 2013, Pages

  Li, Sheng ^a   Ahn, Jung Ho ^b   Strong, Richard D ^c   Brockman, Jay B ^d   Tullsen, Dean M ^c   Jouppi, Norman P ^a  

^a HEWLETT PACKARD LABORATORIES   (United States)

^b Seoul National University   (South Korea)

^c UNIVERSITY OF CALIFORNIA   (United States)

^d UNIVERSITY OF NOTRE DAME   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPREHENSIVE DESIGNS; DEGREE OF CLUSTERING; FUNDAMENTAL COMPONENT; MANY-CORE ARCHITECTURE; MULTICORE AND MANYCORE PROCESSORS; OUT-OF-ORDER PROCESSORS; PERFORMANCE SIMULATION; PERFORMANCE SIMULATOR;

COMMERCE; MICROPROCESSOR CHIPS;

TIMING CIRCUITS;

EID: 84878608239     PISSN: 15443566     EISSN: 15443973     Source Type: Journal    
DOI: 10.1145/2445572.2445577     Document Type: Article

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