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Volumn 1443 LNCS, Issue , 1998, Pages 41-52

Deciding global partial-order properties

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATA THEORY; SEMANTICS; SET THEORY; TEMPORAL LOGIC;

EID: 84878529669     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0055039     Document Type: Conference Paper
Times cited : (12)

References (17)
  • 2
    • 85037030721 scopus 로고
    • Design and synthesis of synchronization skeletons using branching time temporal logic
    • LNCS 131
    • E.M. Clarke and E.A. Emerson. Design and synthesis of synchronization skeletons using branching time temporal logic. Workshop on Logic of Programs, LNCS 131, 52-71, 1981.
    • (1981) Workshop on Logic of Programs , pp. 52-71
    • Clarke, E.M.1    Emerson, E.A.2
  • 3
    • 17444410972 scopus 로고
    • Logical definability of trace languages
    • V. Diekert, G. Rozenberg (Eds.) World Scientific
    • W. Ebinger. Logical definability of trace languages. In V. Diekert, G. Rozenberg (Eds.) The Book of Traces, World Scientific, 382-390, 1995.
    • (1995) The Book of Traces , pp. 382-390
    • Ebinger, W.1
  • 5
    • 0001657367 scopus 로고
    • A partial approach to model checking
    • P. Godefroid and P. Wolper. A partial approach to model checking. Information and Computation 110 (2), 305-326, 1994.
    • (1994) Information and Computation , vol.110 , Issue.2 , pp. 305-326
    • Godefroid, P.1    Wolper, P.2
  • 8
    • 85034819445 scopus 로고
    • Trace theory
    • W. Brauer, W. Reisig, G. Rozenberg (eds.) LNCS 255
    • A. Mazurkiewicz. Trace Theory. In W. Brauer, W. Reisig, G. Rozenberg (eds.), Advances in Petri Nets 1986, LNCS 255, 279-324, 1987.
    • (1987) Advances in Petri Nets 1986 , pp. 279-324
    • Mazurkiewicz, A.1
  • 9
    • 33847258494 scopus 로고
    • Using unfoldings to avoid the state explosion problem in the verification of asynchronous circuits
    • LNCS 663
    • K.L. McMillan. Using unfoldings to avoid the state explosion problem in the verification of asynchronous circuits. Fourth C4V, LNCS 663, 164-177, 1992.
    • (1992) Fourth C4V , pp. 164-177
    • McMillan, K.L.1
  • 10
    • 70350750512 scopus 로고
    • Combining partial order reductions with on-the-fly model checking
    • LNCS 818
    • D. Peled. Combining partial order reductions with on-the-fly model checking. Sixth Conferenceon Computer Aided Verification, LNCS 818, 377-390, 1994.
    • (1994) Sixth Conferenceon Computer Aided Verification , pp. 377-390
    • Peled, D.1
  • 11
    • 0038787373 scopus 로고
    • On undecidability of propositional temporal logics on trace systems
    • W. Penczek. On undecidability of propositional temporal logics on trace systems. Information Processing Letters 43, 147-153, 1992.
    • (1992) Information Processing Letters , vol.43 , pp. 147-153
    • Penczek, W.1
  • 12
    • 34250124963 scopus 로고
    • Modeling concurrency with partial orders
    • V.R. Pratt. Modeling concurrency with partial orders. Intl. J. of Parallel Programming 15 (1), 33-71, 1986.
    • (1986) Intl. J. of Parallel Programming , vol.15 , Issue.1 , pp. 33-71
    • Pratt, V.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.