Magnetic adder based on racetrack memory

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 60, Issue 6, 2013, Pages 1469-1477

  Trinh, Hong Phuc ^a   Zhao, Weisheng ^a   Klein, Jacques Olivier ^a   Zhang, Yue ^a   Ravelsona, Dafine ^a   Chappert, Claude ^a  

^a UNIVERSITÉ PARIS SACLAY   (France)

Author keywords

Domain wall motion; magnetic adder; magnetic circuit; magnetic tunnel junction; racetrack memory; shift register

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; DOMAIN WALLS; INTEGRATED CIRCUIT DESIGN; LEAKAGE CURRENTS; MAGNETIC ANISOTROPY; MAGNETIC CIRCUITS; MAGNETIC LEAKAGE; METALS; MOS DEVICES; OXIDE SEMICONDUCTORS; SEMICONDUCTOR JUNCTIONS; SHIFT REGISTERS; SPICE; TUNNEL JUNCTIONS;

BASIC ELEMENTS; COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR TECHNOLOGIES; DOMAIN WALL MOTION; INPUT AND OUTPUTS; MAGNETIC TUNNEL JUNCTION; PERPENDICULAR MAGNETIC ANISOTROPY; SPINTRONIC DEVICE; ZERO STANDBY POWER;

MAGNETIC DEVICES;

EID: 84878407248     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2012.2220507     Document Type: Article

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