A 12b 1.6GS/s 40mW DAC in 40nm CMOS with >70dB SFDR over entire Nyquist bandwidth

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 56, Issue , 2013, Pages 474-475

  Lin, Wei Te ^a   Kuo, Tai Haur ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CRITICAL CHALLENGES; HIGH-SPEED SIGNALS; IMPLEMENTATION COST; LOW POWER APPLICATION; LOW-POWER CONSUMPTION; NYQUIST BANDWIDTH; SPURIOUS-FREE DYNAMIC RANGE; SWITCHING TRANSIENT;

CAPACITORS; ELECTRIC IMPEDANCE; TRANSIENTS;

POWER QUALITY;

EID: 84876564986     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2013.6487821     Document Type: Conference Paper

References (4)

1. C.-H Lin, F.M.L. van der Goes, J.R. Westra, et al., "A 12b 2.9GS/s DAC with IM3 <-60dBc Beyond 1GHz in 65nm CMOS," ISSCC Dig. Tech. Papers, pp. 74-75, Feb. 2009
2. W.-H. Tseng, C.-W. Fan, and J.-T. Wu, "A 12b 1.25 GS/s DAC in 90nm CMOS with >70dB SFDR up to 500 MHz," ISSCC Dig. Tech. Papers, pp. 192-193, Feb. 2011
3. G. Engel, S. Kuo, and S. Rose, "A 14b 3/6GHz Current-Steering RF DAC in 0.18μm CMOS with 66dB ACLR at 2.9GHz," ISSCC Dig. Tech. Papers, pp. 458-459, Feb. 2012
4. W.-T. Lin and T.-H. Kuo, "A Compact Dynamic-Performance-Improved Current-Steering DAC with Random Rotation-Based Binary-Weighted Selection," IEEE J. Solid-State Circuits, vol. 47, no. 2, pp. 444-453, Feb. 2012