Development of the RLS algorithm based on the iterative equation solvers

International Conference on Signal Processing Proceedings, ICSP

Volumn 1, Issue , 2012, Pages 272-275

  Khokhar, Muhammad Jawad ^a   Younis, Muhammad Shahzad ^a  

^a NATIONAL UNIVERSITY OF SCIENCES AND TECHNOLOGY NUST   (Pakistan)

Author keywords

Gauss Seidel; Iterative matrix inversion techniques; RLS; Steepest descent

Indexed keywords

CONVERGENCE RESULTS; GAUSS-SEIDEL; GAUSS-SEIDEL ALGORITHM; ITERATIVE MATRIX INVERSION; ITERATIVE TECHNIQUE; LINEAR SYSTEM OF EQUATIONS; RLS; STEEPEST DESCENT;

LEAST SQUARES APPROXIMATIONS; LINEAR SYSTEMS; SIGNAL PROCESSING;

ALGORITHMS;

EID: 84876489057     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICoSP.2012.6491653     Document Type: Conference Paper

References (10)

1. D. Watkins, Fundamentals of Matrix Computations, John Wiley & Sons, New York, 2002.
2. S. Haykin, Adaptive Filter Theory, 3rd ed. Prentice Hall, 1995.
3. Z. J. Shi, Convergence of line-search methods for unconstrained optimization, Applied Mathematics and Computation, Vol. 157, pp. 393-405, 2004.
4. V. Zakharov, P. White and J. Liu, Low-Complexity RLS Algorithms Using Dichotomous Coordinate Descent Iterations, IEEE Transactions on Signal Processing, Vol. 56, No. 7, July 2008.
5. Z. Shengkui, M. Zhihong and K. Suiyang, Conjugate Gradient Algorithm Design with RLS Normal Equation, 6th International Conference on Information, Communications & Signal Processing, Dec. 2007.
6. F. Albu and H.K. Kwan, Combined echo and noise cancellation based on Gauss-Seidel pseudo affine projection algorithm, ISCAS '04 Proceedings of the 2004 International Symposium on Circuits and Systems, May 2004.
7. A. Fagan, F. Albu, J. Kadlec and N. Coleman, The Gauss-Seidel fast affine projection algorithm
8. F. Albu and H.K. Kwan, Fast block exact Gauss-Seidel pseudo affine projection algorithm, Electronics Letters, 28 Oct. 2004
9. R. Woods, J. McAllister, G. Lightbody, Y. Yi, FPGA-based implementation of complex signal processing systems, John Wiley & Sons, Ltd, 2008.
10. K.R. Santha, B.C. Chava, K. Bragadishwaran and K. Chandru, FPGA implementation and resource utilization for QRD-RLS systolic array for signal processing applications, 2009 IEEE Region 10 Conference, TENCON, Jan 2009.