![]() |
Volumn 1800 LNCS, Issue , 2000, Pages 916-923
|
Compiling process algebraic descriptions into reconfigurable logic
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ALGEBRA;
COMPUTER HARDWARE;
CONCURRENCY CONTROL;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
HIGH LEVEL LANGUAGES;
COMPUTATIONAL LINGUISTICS;
COMPUTER CIRCUITS;
COMPUTER PROGRAMMING LANGUAGES;
HARDWARE;
ALGEBRAIC DESCRIPTION;
ALGEBRAIC LANGUAGES;
CONCURRENT COMPUTATION;
DIGITAL LOGIC;
RECONFIGURABLE COMPUTER;
RECONFIGURABLE LOGIC;
RUN TIME RECONFIGURATION;
SOFTWARE MODEL;
RECONFIGURABLE HARDWARE;
|
EID: 84876382577
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/3-540-45591-4_126 Document Type: Conference Paper |
Times cited : (5)
|
References (10)
|