Ultra thin hybrid floating gate and high-k dielectric as IGD enabler of highly scaled planar NAND flash technology

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2012, Pages

  Kar, G S ^a   Breuil, L ^a   Blomme, P ^a   Hody, H ^a   Locorotondo, S ^a   Jossart, N ^a   Richard, O ^a   Bender, H ^a   Van Den Bosch, G ^a   Debusschere, I ^a   Van Houdt, J ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CELL PERFORMANCE; CYCLING ENDURANCE; DATA RETENTION; HIGH DENSITY MEMORY; HIGH-K DIELECTRIC; MANUFACTURABILITY; PROGRAM PERFORMANCE; THICKNESS SCALING;

ELECTRON DEVICES;

EID: 84876130393     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2012.6478962     Document Type: Conference Paper

References (8)

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7. P. Blomme, et al., VLSI Tech. 2010, p. 129;
8. P. Blomme, et. al., EDL 2011, vol .33, p. 333