A new SEC-DED error correction code subclass for adjacent MBU tolerance in embedded memory

IEEE Transactions on Device and Materials Reliability

Volumn 13, Issue 1, 2013, Pages 223-230

  Neale, Adam ^a   Sachdev, Manoj ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Error correction codes (ECCs); memories; multiple bit upsets (MBUs); soft errors

Indexed keywords

ERROR CORRECTION CODES; ERROR CORRECTION CODES (ECCS); MULTIPLE BIT UPSET; RADIATION-INDUCED; SEMICONDUCTOR TECHNOLOGY; SINGLE ERROR CORRECTIONS; SINGLE EVENT UPSETS; SOFT ERROR;

DATA STORAGE EQUIPMENT; MEMORY ARCHITECTURE; PROGRAM PROCESSORS; SEMICONDUCTOR DEVICE MANUFACTURE;

ERROR CORRECTION;

EID: 84875002799     PISSN: 15304388     EISSN: 15582574     Source Type: Journal    
DOI: 10.1109/TDMR.2012.2232671     Document Type: Article

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