Novel high-density 5F2 NAND STI cell technology suitable for 256 Mbit and 1 Gbit flash memories

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1997, Pages 271-274

  Shimizu, K ^a   Narita, K ^a   Watanabe, H ^a   Kamiya, E ^a   Takeuchi, Y ^a   Yaegashi, T ^a   Aritome, S ^a   Watanabe, T ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

FLASH MEMORIES; SHALLOW TRENCH ISOLATION (STI);

LOGIC DESIGN; LOGIC GATES; NAND CIRCUITS; SILICON NITRIDE;

CELLULAR ARRAYS;

EID: 84874692086     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)