Synchronization error estimation and controller design for delayed Lur'e systems with parameter mismatches

IEEE Transactions on Neural Networks and Learning Systems

Volumn 23, Issue 10, 2012, Pages 1551-1563

  He, Wangli ^a,b   Qian, Feng ^a   Han, Qing Long ^b   Cao, Jinde ^c  

^a China   (China)

^b CENTRAL QUEENSLAND UNIVERSITY   (Australia)

^c SOUTHEAST UNIVERSITY   (China)

Author keywords

Delayed Lur'e systems; neural networks; parameter mismatches; synchronization

Indexed keywords

FEEDBACK CONTROLLER; LUR'E SYSTEMS; MASTER-SLAVE SYNCHRONIZATION; PARAMETER MISMATCHES; QUASI SYNCHRONIZATION; SUFFICIENT CONDITIONS; SYNCHRONIZATION ERROR; SYNCHRONIZATION ERROR BOUND;

DELAY CIRCUITS; LINEAR MATRIX INEQUALITIES; NEURAL NETWORKS;

SYNCHRONIZATION;

EID: 84873731791     PISSN: 2162237X     EISSN: 21622388     Source Type: Journal    
DOI: 10.1109/TNNLS.2012.2205941     Document Type: Article

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