Drift-like errors compensation in intelligent cyclic A/D converters

17th Symposium IMEKO TC4 - Measurement of Electrical Quantities, 15th International Workshop on ADC Modelling and Testing, and 3rd Symposium IMEKO TC19 - Environmental Measurements

Volumn , Issue , 2010, Pages 619-624

  Jȩdrzejewski, Konrad ^a  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGY; CYCLIC A/D CONVERTERS; DIGITAL PARTS; DRIFT RATES; INPUT SAMPLE; PRACTICAL REALIZATIONS; PRODUCTION COST; SAMPLE-AND-HOLD; SAMPLE-AND-HOLD CIRCUITS;

ALGORITHMS; CIRCUIT THEORY; CMOS INTEGRATED CIRCUITS;

ERRORS;

EID: 84872583130     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. Ed. W. Kester, Analog-Digital Conversion, Analog Devices Inc., 2004.
2. M.E. Waltari, K.A.I Halonen, Circuit Techniques for Low-Voltage and High-Speed A/D Converters, Kluwer Academic Publishers, 2002.
3. A.A. Platonov, K. Jȩdrzejewski, J. Jasnos, "Design and Analysis of Algorithmic Multi-pass A/D Converters with Theoretically Highest Resolution and Rate of Conversion", Measurement, vol. 35, No. 3, pp. 277-287, 2004.
4. A.A. Platonov, K. Jȩdrzejewski, Ł.M. Małkiewicz, J. Jasnos, "Principles of Optimisation, Modelling and Testing of Intelligent Cyclic A/D Converters," Measurement, vol. 39, No. 3, pp. 213-231, 2006.
5. A.A. Platonov, J. Jasnos, K. Jȩdrzejewski, Ł. Małkiewicz, Z. Jaworski, E. Piwowarska, P. Studziński, "Particularities of Cyclic Intelligent ADC Design, Implementation and Adjusting", Proceedings of International Conference on Signals and Electronic Systems ICSES 2008, Cracow, Poland, pp. 43-46, 2008.
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7. A.A. Platonov, J. Szabatin, K. Jȩdrzejewski, "Optimal Synthesis of Smart Measurement Systems with Adaptive Correction of Drifts and Setting Errors of The Sensor's Working Point", IEEE Transactions on Instrumentation and Measurement, vol. 47, No. 3, pp. 659-665, 1998.
8. J. Jasnos, "Analysis and Application of Modified Sub-Optimal Algorithms to ICADC Design," 14th IMEKO Proceedings of International Symposium on New Technologies in Measurement and Instrumentation and 10th Workshop on ADC Modeling and Testing, Gdynia-Jurata, Poland, pp. 564-567, 2005.
9. Ł.M. Małkiewicz, A.A. Platonov, "Methods of Additional Improvement of Intelligent CADC Performance," Proceedings of IEEE Instrumentation and Measurement Technology Conference, IMTC'2007, Warsaw, Poland, CD-ROM, 2007.
10. IEEE Std 1241-2000, "IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters," IEEE Inc., 2001.