A processor description language supporting retargetable multi-pipeline DSP program development tools

Proceedings of the International Symposium on System Synthesis

Volumn Part F129250, Issue , 1998, Pages 31-36

  Siska, Chuck ^a  

^a Rockwell Semiconductor Systems   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; DIGITAL SIGNAL PROCESSORS; PIPELINES; PROGRAM PROCESSORS; SOFTWARE DESIGN;

AUTOMATED GENERATION; DESCRIPTION LANGUAGES; DIGITAL SIGNAL PROCESSORS (DSP); DSP PROGRAMMING; MACHINE DESCRIPTION LANGUAGE; PRODUCTION QUALITY; PROGRAM DEVELOPMENT TOOLS; SOFTWARE DEVELOPMENT TOOLS;

PIPELINE PROCESSING SYSTEMS;

EID: 84872256764     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isss.1998.730593     Document Type: Conference Paper

References (12)

1. Fauth, A., J. Van Praet and M. Freericks, "Describing Instruction Set Processors Using nML, " Proceedings of the European Design and Test Conference (ED&TC), Paris, March 1995, pp.503-507.
2. M. Freericks, 'The nML Machine Description Formalism, " TU Berlin Computer Science Technical Report - Updated & Revised Version 1.5 (Draft), June, 1993.
3. Fauth, A. and A. Knoll, "Automated Generation of DSP Program Development Tools, " in Proceedings of the IEEE ICASSP-93, May 1993.
4. Fauth, A., "Beyond Tool-Specific Machine Descriptions, " in Code Generation for Embedded Processors, Marwedel and Goosens (Eds.), Kluwer Academic Publishers, 1995.
5. Hartoog, M., J. Rowson, P. Reddy, S. Desai, D. Dunlop, E. Harcourt and N. Khullar, "Generation of Software Tools from Processor Descriptions for Hardware/Software Codesign, " Design Automation Conference, 1997.
6. Zivojnovic, V., S. Pees, C. Schlager and H. Meyr, "LISA - Machine Description Language and Generic Machine Model, " ICSPAT, Boston, 1997.
7. Nowak, L., "Graph Based Retargetable Microcode Compilation in the MIMOLA Design System, MICRO-20, 1987, pp. 126-132.
8. Bashford, S. et al, "The MIMOLA Language Version 4.1, " Technical Report, Lehrstuhl Informatik XII, Univ. Dortmund, Setp. 1994.
9. Bradlee, D., R. Henry and S. Eggers, "The Marion System for Retargetable Instruction Scheduling, " Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and Implementation, Toronto, Canada, June, 1991.
10. Liem, C., T. May and P. Paulin, "Instruction-Set Matching and Selection for DSP and ASIP Code Generation, " European Design and Test Conference (ED&TC), 1994, pp. 31-37.
11. Leupers, R. and P. Marwedel, "Instruction-Set Modelling for ASIP Code Generation, " 9th International Conference on VLSI Design, Bangalore, India, Jan. 1996.
12. Hennessy, J. and D. Patterson, Computer Architecture: A Quantitative Approach, Morgan Kaufmann Publishers, Inc., 1996, 2nd Edition.