Adaptive Backpressure: Efficient buffer management for on-chip networks

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2012, Pages 419-426

  Becker, Daniel U ^a   Jiang, Nan ^a   Michelogiannakis, George ^a   Dally, William J ^a  

^a Stanford University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BACK PRESSURES; BACKGROUND TRAFFIC; BUFFER MANAGEMENT; BUFFER SPACE; CHIP-MULTIPROCESSOR; CONTROL FEEDBACK; CONTROL MECHANISM; EXECUTION TIME; HEAVY LOADS; INPUT BUFFERS; MESH NETWORK; NETWORK RESOURCE; NETWORK STABILITY; ON-CHIP NETWORKS; PERFORMANCE CHARACTERISTICS; PERFORMANCE DEGRADATION; TRAFFIC CONDITIONS; TRAFFIC PATTERN; VIRTUAL CHANNELS;

FLOW CONTROL; TRAFFIC CONGESTION;

BENCHMARKING;

EID: 84872070327     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2012.6378673     Document Type: Conference Paper

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