A 2-Gb/s throughput CMOS transceiver chipset with in-package antenna for 60-GHz short-range wireless communication

IEEE Journal of Solid-State Circuits

Volumn 47, Issue 12, 2012, Pages 3160-3171

  Mitomo, Toshiya ^a   Tsutsumi, Yukako ^a   Hoshino, Hiroaki ^a   Hosoya, Masahiro ^a   Wang, Tong ^a   Tsubouchi, Yuta ^a   Tachibana, Ryoichi ^a   Sai, Akihide ^a   Kobayashi, Yuka ^b   Kurose, Daisuke ^a   Ito, Tomohiko ^a   Ban, Koichiro ^a   Tandai, Tomoya ^a   Tomizawa, Takeshi ^a  

^a TOSHIBA CORPORATION   (Japan)

^b Japan Patent Office   (Japan)

Author keywords

60 GHz; CMOS integrated circuits; millimeter wave circuits; transceivers; TX RX switch

Indexed keywords

60 GHZ; 60-GHZ TRANSCEIVERS; BASEBAND CHIPS; BGA PACKAGE; CHIPSET; CMOS TRANSCEIVERS; COMMUNICATION DISTANCE; DATA RATES; FILE TRANSFERS; FRAME EXCHANGES; FULLY INTEGRATED; HIGH-SPEED WIRELESS COMMUNICATION; MAC LAYER; MAC THROUGHPUT; MEDIA ACCESS CONTROL; MILLIMETER WAVE CIRCUITS; OFF-CHIP; PHYSICAL LAYERS; SHORT-INTERVAL; SHORT-RANGE COMMUNICATION; SHORT-RANGE WIRELESS COMMUNICATIONS; TARGET APPLICATION;

ANTENNAS; CMOS INTEGRATED CIRCUITS; ENERGY UTILIZATION; MEDIUM ACCESS CONTROL; TRANSCEIVERS; WIRELESS TELECOMMUNICATION SYSTEMS;

THROUGHPUT;

EID: 84871771981     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2012.2216694     Document Type: Article

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