Implementing hierarchical scheduling on COTS Ethernet switches using a master/slave approach

7th IEEE International Symposium on Industrial Embedded Systems, SIES 2012 - Conference Proceedings

Volumn , Issue , 2012, Pages 76-84

  Iqbal, Zahid ^a   Almeida, Luis ^a   Marau, Ricardo ^a   Behnam, Moris ^b   Nolte, Thomas ^b  

^a UNIVERSITY OF PORTO   (Portugal)

^b MÄLARDALEN UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH EFFICIENT; COMPONENT BASED DESIGN; COMPOSABILITY; ETHERNET SWITCHES; HIERARCHICAL SCHEDULING; MULTIPLE LEVELS; NETWORK RESOURCE; OPEN SOURCES; PROTOTYPE IMPLEMENTATIONS; REAL-TIME COMMUNICATION; RESPONSE-TIME ANALYSIS; TEMPORAL ISOLATION; TEMPORAL PROPERTY;

EMBEDDED SYSTEMS; ETHERNET;

SCHEDULING;

EID: 84871543404     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIES.2012.6356572     Document Type: Conference Paper

References (13)

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