An improved design of virtual output impedance loop for droop-controlled parallel three-phase voltage source inverters

2012 IEEE Energy Conversion Congress and Exposition, ECCE 2012

Volumn , Issue , 2012, Pages 2466-2473

  Wang, Xiongfei ^a   Blaabjerg, Frede ^a   Chen, Zhe ^a  

^a AALBORG UNIVERSITY   (Denmark)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCULATING CURRENT; LABORATORY TEST; LOAD SHARING; OUTPUT CURRENT; OUTPUT VOLTAGES; PARALLEL INVERTER; THREE-PHASE LOADS; THREE-PHASE VOLTAGE SOURCE INVERTERS; UNBALANCED LOADS; VIRTUAL IMPEDANCE; VIRTUAL OUTPUT IMPEDANCES; VIRTUAL RESISTANCE;

ELECTRIC IMPEDANCE; ENERGY CONVERSION; EXHIBITIONS;

QUALITY CONTROL;

EID: 84870951519     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECCE.2012.6342404     Document Type: Conference Paper

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