Experimental evaluation of Physically Unclonable Functions in 65 nm CMOS

European Solid-State Circuits Conference

Volumn , Issue , 2012, Pages 486-489

  Maes, Roel ^a   Rožić, Vladimir ^a   Verbauwhede, Ingrid ^a   Koeberl, Patrick ^b   Van Der Sluis, Erik ^c   Van Der Leest, Vincent ^c  

^a UNIVERSITY OF LEUVEN   (Belgium)

^b Intel Ireland Ltd   (Ireland)

^c Intrinsic ID   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ASIC DESIGN FLOW; COMPARATIVE ANALYSIS; EXPERIMENTAL EVALUATION; LOW POWER; SILICON DEVICES; SILICON TECHNOLOGIES; STANDARD CELL; TEST CHIPS; TEST VEHICLE; VARYING TEMPERATURE;

ELECTRIC BATTERIES; INTEGRATED CIRCUITS; SILICON;

CRYPTOGRAPHY;

EID: 84870784876     PISSN: 19308833     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2012.6341361     Document Type: Conference Paper

References (8)

1. Altera. Reliability report 52 q3 2011. http://www.altera.com/literature/ rr/rr.pdf.
2. Jorge Guajardo, Sandeep S. Kumar, Geert-Jan Schrijen, and Pim Tuyls. FPGA intrinsic PUFs and their use for IP protection. In Workshop on Cryptographic Hardware and Embedded Systems, pages 63-80, 2007.
3. Jae W. Lee, Daihyun Lim, Blaise Gassend, G. Edward Suh, Marten van Dijk, and Srinivas Devadas. A technique to build a secret key in integrated circuits for identification and authentication application. In Symposium on VLSI Circuits, pages 176-159, 2004.
4. Roel Maes, Pim Tuyls, and Ingrid Verbauwhede. Intrinsic PUFs from flip-flops on reconfigurable devices. In Workshop on Information and System Security, 2008.
5. Roel Maes and Ingrid Verbauwhede. Physically unclonable functions: A study on the state of the art and future research directions. In Ahmad-Reza Sadeghi and David Naccache, editors, Towards Hardware-Intrinsic Security, Information Security and Cryptography, pages 3-37. Springer, Heidelberg, 2010.
6. Peter Simons, Erik van der Sluis, and Vincent van der Leest. Buskeeper PUFs, a promising alternative to D Flip-Flop PUFs. In IEEE Int. Symposium on Hardware-Oriented Security and Trust, 2012.
7. Y. Su, J. Holleman, and B. Otis. A 1.6pJ/bit 96% Stable Chip-ID Generating Circuit using Process Variations. In IEEE Int. Solid-State Circuits Conference, pages 406-611, Feb. 2007.
8. G. Edward Suh and Srinivas Devadas. Physical unclonable functions for device authentication and secret key generation. In Design Automation Conference, pages 9-14, 2007.