Sparse matrix-vector multiplication on GPGPU clusters: A new storage format and a scalable implementation

Proceedings of the 2012 IEEE 26th International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2012

Volumn , Issue , 2012, Pages 1696-1702

  Kreutzer, Moritz ^a   Hager, Georg ^a   Wellein, Gerhard ^a   Fehske, Holger ^b   Basermann, Achim ^c   Bishop, Alan R ^d  

^a Erlangen Regional Computing Center   (Germany)

^b UNIVERSITY OF GREIFSWALD   (Germany)

^c GERMAN AEROSPACE CENTER DLR   (Germany)

^d LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

CUDA; GPGPU; Sparse matrices

Indexed keywords

CUDA; DISTRIBUTED MEMORY; GPGPU; MATRIX STRUCTURE; MEMORY FOOTPRINT; MEMORY OVERHEADS; PARALLELIZATIONS; PERFORMANCE BOTTLENECKS; PERFORMANCE MODEL; PERFORMANCE PROPERTIES; SCALABLE IMPLEMENTATION; SPARSE MATRICES; SPARSE MATRIX-VECTOR MULTIPLICATION; SPARSE SOLVERS; SPARSITY PATTERNS; STORAGE FORMATS; TEST SCENARIO;

DISTRIBUTED PARAMETER NETWORKS; MATRIX ALGEBRA;

PROGRAM PROCESSORS;

EID: 84867417216     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPSW.2012.211     Document Type: Conference Paper

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