The Intel® many integrated core architecture

Proceedings of the 2012 International Conference on High Performance Computing and Simulation, HPCS 2012

Volumn , Issue , 2012, Pages 365-366

  Duran, Alejandro ^a   Klemm, Michael ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CO-PROCESSORS; EXECUTION MODEL; GENERAL PURPOSE; HIGH PERFORMANCE COMPUTING (HPC); INTEGRATED CORE; MANY-CORE; PARALLELIZATIONS; PROGRAMMABILITY; PROGRAMMING MODELS; SCIENTIFIC APPLICATIONS; SHARED MEMORIES; VECTORIZATION;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAM PROCESSORS;

MEMORY ARCHITECTURE;

EID: 84867018625     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCSim.2012.6266938     Document Type: Conference Paper

References (2)

1. Intel Corporation, "Introducing Intel Many Integrated Core Architecture", 2011. www.intel.com/technology/architecture-silicon/mic/ index.htm.
2. OpenMP ARB, The OpenMP Specification v3.1, http://www.openmp.org.