Spin neuron for ultra low power computational hardware

Device Research Conference - Conference Digest, DRC

Volumn , Issue , 2012, Pages 221-222

  Sharad, Mrigank ^a   Panagopoulos, Georgios ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS DESIGN; COSIMULATION; CURRENT MODE; DEVICE MODELS; HYBRID DESIGN; LATERAL SPIN VALVE; LOW POWER; LOW RESISTANCE; MULTIPLE INPUTS; PROCESSING HARDWARE; TERMINAL VOLTAGES; ULTRA LOW POWER;

DATA PROCESSING; ENERGY UTILIZATION; HARDWARE; MAGNETS; SIGNAL PROCESSING;

NEURONS;

EID: 84866909735     PISSN: 15483770     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DRC.2012.6257039     Document Type: Conference Paper

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