x11 performance increase, x6.9 endurance enhancement, 93% energy reduction of 3D TSV-integrated hybrid ReRAM/MLC NAND SSDs by data fragmentation suppression

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2012, Pages 134-135

  Fujii, Hiroki ^a   Miyaji, Kousuke ^a   Johguchi, Koh ^a   Higuchi, Kazuhide ^a   Sun, Chao ^a   Takeuchi, Ken ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA FRAGMENTATION; ENERGY REDUCTION; INTELLIGENT DATA; SOLID-STATE DRIVES; THROUGH-SILICON-VIA;

ALGORITHMS; ENERGY UTILIZATION; INFORMATION MANAGEMENT; THREE DIMENSIONAL COMPUTER GRAPHICS; VLSI CIRCUITS;

DIGITAL STORAGE;

EID: 84866628728     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2012.6243826     Document Type: Conference Paper

References (6)

1. Y. S. Chen et al., IEDM, pp.717-720, 2011.
2. K. Higuchi et al., SSDM, pp.1011-1012, 2011.
3. http://www.elpida.com/ja/
4. T. Hatanaka et al., Symp. VLSI Circ., pp.78-79, 2010.
5. K. Takeuchi et al., IEEE JSSC, pp.219-232, 2007.
6. http://traces.cs.umass.edu/index.php/Storage/Storage