A 5GS/s 12.2pJ/conv. analog charge-domain FFT for a software defined radio receiver front-end in 65nm CMOS

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2012, Pages 39-42

  Sadhu, Bodhisatwa ^a   Sturm, Martin ^a   Sadler, Brian M ^b   Harjani, Ramesh ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

^b U S ARMY RESEARCH LABORATORY   (United States)

Author keywords

cognitive radio; CR; FFT; filter; SDR; software defined radio; switched capacitor

Indexed keywords

CHANNELIZERS; DYNAMIC RANGE; FILTER; LOW POWER; RECEIVER FRONT-ENDS; RF FRONT END; SAMPLE RATE; SDR; SOFTWARE-DEFINED RADIOS; SWITCHED CAPACITOR; WIDE-BAND;

CHROMIUM; COGNITIVE RADIO; DIGITAL INTEGRATED CIRCUITS; RADIO; SOFTWARE RADIO;

FAST FOURIER TRANSFORMS;

EID: 84866623297     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2012.6242227     Document Type: Conference Paper

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