High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC)

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2012, Pages 180-181

  Hong, Sung Wan ^a   Kong, Tae Hwang ^a   Jung, Seungchul ^a   Lee, Sung Woo ^a   Wang, Se Won ^a   Im, Jong Pil ^a   Cho, Gyu Hyeong ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

AREA EFFICIENT; COMPENSATION COMPONENT; CONTROLLER DESIGNS; CORE SIZE; MILLER COMPENSATION; OFF-CHIP; PEAK EFFICIENCY;

HVDC POWER TRANSMISSION; VLSI CIRCUITS;

DC-DC CONVERTERS;

EID: 84866615030     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2012.6243849     Document Type: Conference Paper

References (7)

1. Ahmad, H.H., et.al., "A 300mA 14mV-ripple digitally controlled buck converter using frequency domain ΔΣADC and hybrid PWM generator", ISSCCDig.Tech. Papers, pp. 202-203, Feb. 2010.
2. Soenen, E.G., et.al., "A robust digital DC-DC converter with rail-to-rail output range in 40nm CMOS", ISSCC Dig.Tech. Papers, pp. 198-199, Feb. 2010.
3. Kuttner, F., et.al., "A digitally controlled DC-DC converter for SoC in 28nm CMOS", ISSCC Dig. Tech.Papers, pp. 387-385, Feb. 2011.
4. Y. U. Hong, et.al., "Single-chip quasi-PWM DC-DC converter with fast transient response comprising loop-bandwidth control", Inst. Electr. Eng. Electron.Lett., vol. 8, no. 41, pp. 501-503, 2005.
5. Hong-Wei Huang, et.al., "On-chip Compensated Error Amplifier for Fast Transient DC-DC converters", Electro/information Technology, IEEE international Conference on, pp. 103-108, May. 2006.
6. P. Y. Wu, et.al., "Area- and power-efficient monolithic buck converters with pseudo-type III compensation", IEEEJ. Solid-State Circuits, vol. 45, no. 8, pp. 1446-1455, Aug. 2010.
7. L. H. Phuc, et.al., "Integrated zero-inductor-current detection circuit for step-up DC-DC Converters", Electron. Lett., vol. 42, no. 16, pp.943-944, Aug. 2006