Integrated DC link capacitor/bus structures to minimize external ESL contribution to voltage overshoot

2012 IEEE Transportation Electrification Conference and Expo, ITEC 2012

Volumn , Issue , 2012, Pages

  Brubaker, M A ^a   Kirbie, H C ^a   Hosking, T A ^a  

^a SBE Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT PATHS; DC LINK CAPACITOR; EQUIVALENT SERIES INDUCTANCE; INTEGRATED CAPACITORS; INTERNAL SWITCHES; INTERNAL VALUES; INVERTER APPLICATION; REDUCED SWITCH; TURN-OFF TIME; VOLTAGE OVERSHOOT;

ELECTRIC UTILITIES; EXHIBITIONS; INDUCTANCE; VOLTAGE REGULATORS;

CAPACITORS;

EID: 84866598118     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ITEC.2012.6243453     Document Type: Conference Paper

References (7)

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2. Sawyer, E. D., "Low Inductance - Low Temp Rise DC Bus Capacitor Properties Enabling the Optimization of High Power Inverters", PCIM 2010, Nuremburg, Germany, May 4-6.
3. M. A. Brubaker, T. A. Hosking, and E. D. Sawyer, "Characterization of Equivalent Series Inductance for DC Link Capacitor and Bus Structures, To be presented at PCIM 2012.
4. Montanari, D., Saarinen, K., Scagliarini, F., Zeidler, D., Matti Niskala and Nender, C., "Film Capacitors for Automotive and Industrial Applications", CARTS Europe, September 2008.
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