All-on-chip $dq$-frame based D-STATCOM control implementation in a low-cost FPGA

IEEE Transactions on Industrial Electronics

Volumn 60, Issue 2, 2013, Pages 659-669

  Sepulveda, Cristian A ^a   Munoz, Javier A ^b   Espinoza, José R ^a   Figueroa, Miguel E ^a   Melin, Pedro E ^a  

^a UNIVERSITY OF CONCEPCIÓN   (Chile)

^b UNIVERSIDAD DE TALCA   (Chile)

Author keywords

Digital control; Distribution STATic COMpensator (DSTATCOM); field programmable gate array (FPGA); Park transform

Indexed keywords

CONTROLLERS; DIGITAL CONTROL SYSTEMS; ELECTRIC POWER FACTOR CORRECTION; HARDWARE; POWER ELECTRONICS; SIGNAL PROCESSING; SIGNAL RECEIVERS;

ANTI-WINDUP; CONTROL IMPLEMENTATION; CONTROLLER PERFORMANCE; DIGITAL CONTROL; DIGITAL CONTROLLERS; DISTRIBUTION STATIC COMPENSATOR; DSTATCOM; DYNAMIC TESTS; FPGA DEVICES; HARDWARE RESOURCES; LOW POWER; OVER SAMPLING; PARK TRANSFORM; REACTIVE CURRENTS; TIME MULTIPLEXING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 84866597956     PISSN: 02780046     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIE.2012.2206353     Document Type: Article

References (22)

1. H. Haibing, W. Shi, Y. Lu, and Y. Xing, "Design considerations for DSP controlled 400 Hz shunt active power filter in an aircraft power system," IEEE Trans. Ind. Electron., vol. 59, no. 9, pp. 3624-3634, Sep. 2012.
2. M. Kazmierkowski, M. Jasinski, and G. Wrona, "DSP-based control of grid-connected power converters operating under grid distortions," IEEE Trans. Ind. Informat., vol. 7, no. 2, pp. 204-211, May 2011.
3. J. Muñoz, J. Espinoza, E. Espinosa, C. Baier, P. Melin, L. Moran, and D. Sbárbaro, "Design of a discrete-time linear control strategy for a multicell UPQC," IEEE Trans. Ind. Electron., vol. 59, no. 10, pp. 3797-3807, Oct. 2012.
4. A. Omar, N. Rahim, and S. Mekhilef, "Three-phase synchronous PWM for flyback converter with power-factor correction using FPGA ASIC design," IEEE Trans. Ind. Electron., vol. 51, no. 1, pp. 96-106, Feb. 2004.
5. A. Agarwal and V. Agarwal, "FPGA realization of trapezoidal PWM for generalized frequency converter," IEEE Trans. Ind. Informat., vol. 8, no. 3, pp. 501-510, Aug. 2012.
6. J. Alvarez, O. Lopez, F. Freijedo, and J. Doval-Gandoy, "Digital parameterizable VHDL module for multilevel multiphase space vector PWM," IEEE Trans. Ind. Electron., vol. 58, no. 9, pp. 3946-3957, Sep. 2011.
7. R. Garcia-Gil, J. Espi, E. Dede, and E. Maset, "An all-digital controlled ac-dc matrix converter with high-frequency isolation and power factor correction," in Proc. IEEE ISIE, May 2004, vol. 2, pp. 1075-1080.
8. T. Atalik, M. Deniz, E. Koc, C. O. Gercek, B. Gultekin, M. Ermis, and I. Cadirci, "Multi-DSP and-FPGA based fully-digital control system for cascaded multilevel converters used in FACTS applications," IEEE Trans. Ind. Informat., vol. 8, no. 3, pp. 511-527, Aug. 2012.
9. M. Aimé, G. Gateau, and T. Meynard, "Implementation of a peak-current-control algorithm within a field-programmable gate array," IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 406-418, Feb. 2007. (Pubitemid 46444038)
10. O. Lopez, J. Alvarez, J. Doval-Gandoy, F. Freijedo, A. Nogueiras, A. Lago, and C. Penalver, "Comparison of the FPGA implementation of two multilevel space vector PWM algorithms," IEEE Trans. Ind. Electron., vol. 55, no. 4, pp. 1537-1547, Apr. 2008. (Pubitemid 351585967)
11. M. Hamouda, H. Blanchette, K. Al-Haddad, and F. Fnaiech, "An efficient DSP-FPGA-based real-time implementation method of SVM algorithms for an indirect matrix converter," IEEE Trans. Ind. Electron., vol. 58, no. 11, pp. 5024-5031, Nov. 2011.
12. S. Xiaoyin and S. Dong, "Development of a new robot controller architecture with FPGA-based IC design for improved high-speed performance," IEEE Trans. Ind. Informat., vol. 3, no. 4, pp. 312-321, Nov. 2007.
13. M. Gora, A. Maiti, and P. Schaumont, "A flexible design flow for software IP binding in FPGA," IEEE Trans. Ind. Informat., vol. 6, no. 4, pp. 719-728, Nov. 2010.
14. T. Orlowska-Kowalska and M. Kaminski, "FPGA implementation of the multilayer neural network for the speed estimation of the two-mass drive system," IEEE Trans. Ind. Informat., vol. 7, no. 3, pp. 436-445, Aug. 2011.
15. S. Zeliang, X. Shaofeng, and L. Qunzhan, "Single-phase back-to-back converter for active power balancing, reactive power compensation, harmonic filtering in traction power system," IEEE Trans. Power Electron., vol. 26, no. 2, pp. 334-343, Feb. 2011.
16. F. Taeed, Z. Salam, and S. Ayob, "FPGA implementation of a single input fuzzy logic controller for boost converter with the absence of an external analog to digital converter," IEEE Trans. Ind. Electron., vol. 59, no. 2, pp. 1208-1217, Feb. 2012.
17. E. Monmasson, L. Idkhajine, M. Cirstea, I. Bahri, A. Tisan, and M. Naouar, "FPGAs in industrial control applications," IEEE Trans. Ind. Informat., vol. 7, no. 2, pp. 224-243, May 2011.
18. C. Liu and Y. Hsu, "Design of a self-tuning PI controller for a STATCOM using particle swarm optimization," IEEE Trans. Ind. Electron., vol. 57, no. 2, pp. 702-715, Feb. 2010.
19. K. Wang and M. Crow, "Power system voltage regulation via STATCOM internal nonlinear control," IEEE Trans. Power Syst., vol. 26, no. 3, pp. 1252-1262, Aug. 2011.
20. J. Muñoz, J. Espinoza, E. Espinosa, C. Baier, and P. Melin, "Systematic design comparison of discrete-time linear controllers for a DSTATCOM," in Proc. IEEE ISIE, Jul. 2010, pp. 1103-1109.
21. S.-K. Sul, Control of Electric Machine Drive Systems. Hoboken, NJ: Wiley, 2011.
22. E. Monmasson, L. Idkhajine, and M. W. Naouar, "FPGA based controllers," IEEE Ind. Electron. Mag., vol. 5, no. 1, pp. 14-26, Mar. 2011.