III-V field effect transistors for future ultra-low power applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2012, Pages 45-46

  Dewey, G ^a   Chu Kung, B ^a   Kotlyar, R ^a   Metz, M ^a   Mukherjee, N ^a   Radosavljevic, M ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MOSFET STRUCTURES; MOSFETS; SUBTHRESHOLD; THIN BODY; TRI-GATE MOSFET; TRIGATE; TUNNELING FET; ULTRALOW POWER APPLICATION;

DISSOCIATION; ELECTROSTATICS;

MOSFET DEVICES;

EID: 84866561684     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2012.6242453     Document Type: Conference Paper

References (6)

1. G. Dewey et al., IEDM Tech. Digest (2009).
2. M. Radosavljavic et al., IEDM Tech. Digest (2011)
3. C. Hu et al., VLSI-TSA 14 (2008)
4. G. Dewey et al., IEDM Tech. Digest (2011)
5. M. Luisier et al., Jour. Appl. Phys. (2010)
6. U. Avci et al., VLSI Tech Digest (2012)