Demonstration of improved heteroepitaxy, scaled gate stack and reduced interface states enabling heterojunction tunnel FETs with high drive current and high on-off ratio

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2012, Pages 53-54

  Mohata, D K ^a   Bijesh, R ^a   Zhu, Y ^b   Hudait, M K ^b   Southwick, R ^c   Chbili, Z ^c   Gundlach, D ^c   Suehle, J ^c   Fastenau, J M ^d   Loubychev, D ^d   Liu, A K ^d   Mayer, T S ^a   Narayanan, V ^a   Datta, S ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

^b VIRGINIA POLYTECHNIC INSTITUTE AND STATE UNIVERSITY   (United States)

^c NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^d IQE INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BI-LAYER; DRIVE CURRENTS; EFFECTIVE OXIDE THICKNESS; GAAS; GATE STACKS; HIGH DRIVE CURRENT; I-V MEASUREMENTS; ON-OFF RATIO; TUNNEL FET;

EPITAXIAL GROWTH; HAFNIUM OXIDES; HETEROJUNCTIONS; TUNNEL JUNCTIONS;

LOGIC GATES;

EID: 84866543448     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2012.6242457     Document Type: Conference Paper

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6. Seabaugh et. al, IEEE Proc.,2010