High-aspect ratio through silicon via (TSV) technology

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2012, Pages 173-174

  Chang, H B ^a   Chen, H Y ^a   Kuo, P C ^a   Chien, C H ^a   Liao, E B ^a   Lin, T C ^a   Wei, T S ^a   Lin, Y C ^a   Chen, Y H ^a   Yang, K F ^a   Teng, H A ^a   Tsai, W C ^a   Tseng, Y C ^a   Chen, S Y ^a   Hsieh, C C ^a   Chen, M F ^a   Liu, Y H ^a   Wu, T J ^a   Hou, Shang Y ^a   Chiou, W C ^a   Jeng, S P ^a   Yu, C H ^a   more..

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS CHIPS; ELECTRICAL PERFORMANCE; EMBEDDED DEVICE; EXCELLENT PERFORMANCE; FOUNDRY TECHNOLOGY; HIGH ASPECT RATIO; IC YIELD; LOW COSTS; MANUFACTURABILITY; THROUGH-SILICON-VIA;

ASPECT RATIO; THREE DIMENSIONAL COMPUTER GRAPHICS;

TECHNOLOGY;

EID: 84866531869     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIT.2012.6242517     Document Type: Conference Paper

References (6)

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4. A. Kang et al., "8Gb DDR3 DRAM using through-silicon-via technology" IEEE J. Solid-Stae Circuits, vol. 45, no. 1, 2010, pp. 111.
5. C.L. Yu et al., VLSI Tech. Dig., 2011, pp. 138.
6. K.F. Yang et al., VLSI Tech. Dig., 2011, pp. 140.