Physical aspects of low power synapses based on phase change memory devices

Journal of Applied Physics

Volumn 112, Issue 5, 2012, Pages

  Suri, Manan ^a   Bichler, Olivier ^b   Querlioz, Damien ^c   Traoré, Boubacar ^a   Cueto, Olga ^a   Perniola, Luca ^a   Sousa, Veronique ^a   Vuillaume, Dominique ^d   Gamrat, Christian ^b   Desalvo, Barbara ^a  

^a CEA GRENOBLE   (France)

^b DIF   (France)

^c UNIVERSITÉ PARIS SACLAY   (France)

^d INSTITUT D ELECTRONIQUE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BEHAVIORAL MODEL; BIOLOGICALLY INSPIRED; CHALCOGENIDE MATERIALS; FEED-FORWARD; LOW POWER; NEUROMORPHIC; NEUROMORPHIC SYSTEMS; PHYSICAL ASPECTS; REAL WORLD DATA; SPIKING NEURAL NETWORKS; VISUAL PATTERN;

NEURAL NETWORKS; PHASE CHANGE MEMORY;

COMPUTER SIMULATION;

EID: 84866367657     PISSN: 00218979     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.4749411     Document Type: Conference Paper

References (50)

1. J. Seo, B. Brezzo, Y. Liu, B. D. Parker, S. K. Esser, R. K. Montoye, B. Rajendran, J. A. Tierno, L. Chang, D. S. Modha, and D. J. Friedman, A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons., in IEEE Custom Integrated Circuits Conference (CICC), 2011.
2. P. Merolla, J. Arthur, F. Akopyan, N. Imam, R. Manohar, and D. S. Modha, A digital neurosynaptic core using embedded crossbar memory with 45pJ per spike in 45nm., in IEEE Custom Integrated Circuits Conference (CICC), 2011.
3. J. Schemmel, A. Grubl, K. Meier, and E. Mueller, Implementing synaptic plasticity in a VLSI spiking neural network model., in The 2006 International Joint Conference on Neural Networks (IJCNN), (IEEE, 2006), pp. 1-6.
4. G. Indiveri, E. Chicca, and R. Douglas, A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity., IEEE Trans. Neural Networks 17, 211-221 (2006). 10.1109/TNN.2005.860850
5. J. V. Arthur and K. Boahen, Learning in silicon: Timing is everything., in Advances in Neural Information Processing Systems (Curran Associates, Inc., 2006), Vol. 18, pp. 281-1185.
6. G. Snider, R. Amerson, D. Carter, H. Abdalla, M. S. Qureshi, J. Léveillé, M. Versace, H. Ames, S. Patrick, B. Chandler, A. Gorchetchnikov, and E. Mingolla, From synapses to circuitry: Using memristive memory to explore the electronic brain., Computer 44, 21-28 (2011). 10.1109/MC.2011.48
7. R. Serrano-Gotarredona, M. Oster, P. Lichtsteiner, A. Linares-Barranco, R. Paz-Vicente, F. Gomez-Rodriguez, L. Camunas-Mesa, R. Berner, M. Rivas-Perez, T. Delbruck, S.-C. Liu, R. Douglas, P. Hafliger, G. Jimenez-Moreno, A. C. Ballcels, T. Serrano-Gotarredona, and A. J. Acosta-Jimenez, CAVIAR: A 45k neuron, 5M synapse, 12G connects/s AER hardware sensory-processing-learning- actuating system for high-speed visual object recognition and tracking., IEEE Trans. Neural Networks 20 (9), 1417-1438 (2009). 10.1109/TNN.2009.2023653
8. M. M. Khan, D. R. Lester, L. A. Plana, A. Rast, X. Jin, E. Painkras, and S. B. Furber, SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor., in The 2008 International Joint Conference on Neural Networks (IJCNN), (IEEE, 2008), pp. 2849-2856.
9. D. Purves, Neuroscience, 3rd ed. (Sinauer Associates, Inc, Massachusetts, 2004), pp. 7-9.
10. S. Mitra, S. Fusi, and G. Indiveri, A VLSI spike-driven dynamic synapse which learns only when necessary., in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 2006.
11. K. K. Likharev, and D. B. Strukov, CMOL: Devices, Circuits, and Architectures., in Introducing Molecular Electronics, edited by, G. Cuniberti, (Springer, Berlin, 2005), Chap., p. 447.
12. F. Alibart, S. Pleutin, D. Guérin, C. Novembre, S. Lenfant, K. Lmimouni, C. Gamrat, and D. Vuillaume, An organic nanoparticle transistor behaving as a biological spiking synapse., Adv. Funct. Mater. 20, 330-337 (2010). 10.1002/adfm.200901335
13. S. Folling, O. Turel, and K. K. Likharev, Single-electron latching switches as nanoscale synapses., in The 2001 International Joint Conference on Neural Networks (IJCNN) (IEEE, 2001), pp. 216-221.
14. A. K. Friesz, A. C. Parker, C. Zhou, K. Ryu, J. M. Sanders, H.-S. P. Wong, and J. Deng, A biomimetic carbon nanotube synapse circuit., in Biomedical Engineering Society (BMES), Annual Fall Meeting, 2007.
15. Q. Lai, L. Zhang, Z. Li, W. F. Stickle, R. S. Williams, and Y. Chen, Ionic/electronic hybrid materials integrated in a synaptic transistor with signal processing and learning functions., Adv. Mater. 22, 2448-2453 (2010). 10.1002/adma.201000282
16. T. Hasegawa, K. Terabe, T. Tsuruoka, and M. Aono, Atomic switch: Atom/ion movement controlled devices for beyond von-neumann computers., Adv. Mater. 24, 252-267 (2012). 10.1002/adma.201102597
17. X. L. Zhang, A mathematical model of a neuron with synapses based on physiology., in Nature Precedings, 2008.
18. A. R. Sargsyan, A. A. Melkonyan, C. Papatheodoropoulos, H. H. Mkrtchian, and G. K. Kostopoulos, A model synapse that incorporates the properties of short-term and long- term synaptic plasticity., Neural Networks 16 (8), 1161-1177 (2003). 10.1016/S0893-6080(03)00135-7
19. S. Song, Hebbian learning and spike-timing-dependent plasticity., in Computational Neuroscience, edited by, J. Feng, (Chapman and Hall/CRC, 2004), Chap..
20. B. DeSalvo, Silicon Non-Volatile Memories (Wiley-ISTE, 2009), pp. 188-216.
21. M. Suri, V. Sousa, L. Perniola, D. Vuillaume, and B. DeSalvo, Phase change memory for synaptic plasticity application in neuromorphic systems., in The International Joint Conference on Neural Networks (IJCNN) (IEEE, 2011), pp. 619-624.
22. M. Suri, O. Bichler, D. Querlioz, O. Cueto, L. Perniola, V. Sousa, D. Vuillaume, C. Gamrat, and B. DeSalvo, Phase change memory as synapse for ultra-dense neuromorphic systems: Application to complex visual pattern extraction., in IEEE International Electron Devices Meeting (IEDM), 2011.
23. D. Kuzum, R. G. D. Jeyasingh, B. Lee, and H.-S. P. Wong, Nanoelectronic programmable synapses based on phase change materials for brain-inspired computing., Nano Lett. 12 (5), 2179-2186 (2012). 10.1021/nl201040y
24. S. H. Jo, T. Chang, I. Ebong, B. B. Bhavidya, P. Mazumder, and W. Lu, Nanoscale memristor device as synapse in neuromorphic systems., Nano Lett. 10, 1297-1301 (2010). 10.1021/nl904092h
25. S. Yu and H. S. P. Wong, Modeling the switching dynamics of programmable-metallization-cell (PMC) memory and its application as synapse device for a neuromorphic computation system., in IEEE International Electron Devices Meeting (IEDM) (IEEE, 2010), pp. 520-523.
26. S. Yu, Y. Wu, R. G. D. Jeyasingh, D. Kuzum, and H.-S. P. Wong, An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation., in IEEE Trans. Electron Devices 58 (8), 2729-2737 (2011). 10.1109/TED.2011.2147791
27. H.-S. P. Wong, S. Raoux, S. Kim, J. Liang, J. P. Reifenberg, B. Rajendran, M. Asheghi, and K. E. Goodson, Phase change memory., in Proc. IEEE 98 (12), 2201-2227 (2010). 10.1109/JPROC.2010.2070050
28. O. Bichler, M. Suri, D. Querlioz, D. Vuillaume, B. DeSalvo, and C. Gamrat, Visual pattern extraction using energy-efficient 2-PCM synapse' neuromorphic architecture., IEEE Trans. Electron Devices 59 (8), 2206-2214 (2012). 10.1109/TED.2012.2197951
29. A. Fantini, L. Perniola, M. Armand, J. F. Nodin, V. Sousa, A. Persico, J. Cluzel, C. Jahan, S. Maitrejean, S. Lhostis, A. Roule, C. Dressler, G. Reimbold, B. De Salvo, P. Mazoyer, D. Bensahel, and F. Boulanger, Comparative assessment of GST and GeTe materials for application to embedded phase-change memory devices., in 2009 IEEE International Memory Workshop (IMW), 2009.
30. A. Pirovano, A. L. Lacaita, A. Benvenuti, F. Pellizzer, and R. Bez, Electronic switching in phase change memories., IEEE Trans. Electron Devices 51 (3), 452-459 (2004). 10.1109/TED.2003.823243
31. A. Gliere, O. Cueto, and J. Hazart, Coupling of Level set method with an electrothermal solver to simulate GST based PCM cells., in International conference on Simulation of Semiconductor Process and Devices (SISPAD) (IEEE, 2011), pp. 63-66.
32. G. Bruns, P. Merkelbach, C. Schlockermann, M. Salinga, M. Wuttig, T. D. Happ, J. B. Philipp, and M. Kund, Nanosecond switching in GeTe phase change memory cells., Appl. Phys. Lett. 95, 043108 (2009). 10.1063/1.3191670
33. C. Sandhya, A. Bastard, L. Perniola, J. C. Bastien, A. Toffoli, E. Henaff, A. Roule, A. Persico, B. Hyot, V. Sousa, B. De Salvo, and G. Reimbold, Analysis of the effect of boron doping on GeTe phase change memories., in IEEE International Reliability Physics Symposium (IRPS), 2012.
34. 5, J. Appl. Phys. 105, 104902 (2009). 10.1063/1.3126501
35. M. Boniard, D. Ielmini, A. L. Lacaita, A. Redaelli, A. Pirovano, I. Tortorelli, M. Allegra, M. Magistretti, C. Bresolin, D. Erbetta, A. Modelli, E. Varesi, F. Pellizzer, and R. Bez, Impact of material composition on the write performance of phase-change memory devices., in IEEE International Memory Workshop (IMW), 2010.
36. L. van Pieterson, M. H. R. Lankhorst, M. van Schijndel, A. E. T. Kuiper, and J. H. J. Roosen, Phase-change recording materials with a growth-dominated crystallization mechanism: A materials overview., J. Appl. Phys. 97, 083520 (2005). 10.1063/1.1868860
37. G. Navarro, N. Pashkov, M. Suri, V. Sousa, L. Perniola, S. Maitrejean, A. Persico, A. Roule, A. Toffoli, B. DeSalvo, P. Zuliani, and R. Annunziata, Electrical performances of tellurium-rich GexTe1-x Phase change memories., in IEEE International Memory Workshop (IMW), 2011.
38. S. Braga, N. Pashkov, L. Perniola, A. Fantini, A. Cabrini, G. Torelli, V. Sousa, B. De Salvo, and G. Reimbold, Effects of alloy composition on multilevel operation in self-heating phase change memories., in IEEE International Memory Workshop (IMW), 2011.
39. A. Fantini, V. Sousa, L. Perniola, E. Gourvest, J. C. Bastien, S. Maitrejean, S. Braga, N. Pashkov, A. Bastard, B. Hyot, A. Roule, A. Persico, H. Feldis, C. Jahan, J. F. Nodin, D. Blachier, A. Toffoli, G. Reimbold, F. Fillot, F. Pierre, R. Annunziata, D. Benshael, P. Mazoyer, C. Vallée, T. Billon, J. Hazart, B. De Salvo, F. Boulanger, N-doped GeTe as performance booster for embedded phase-change memories., in IEEE International Electron Devices Meeting (IEDM), 2010.
40. D. Querlioz, P. Dollfus, O. Bichler, and C. Gamrat, Learning with memristive devices: How should we model their behavior?, in IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH) (IEEE, 2011), pp. 150-156.
41. J. Rubin, D. D. Lee, and H. Sompolinsky, Equilibrium properties of temporally asymmetric Hebbian plasticity., Phys. Rev. Lett. 86, 364-367 (2001). 10.1103/PhysRevLett.86.364
42. K. Sonoda, A. Sakai, M. Moniwa, K. Ishikawa, O. Tsuchiya, and Y. Inoue, A compact model of phase change memory based on rate equations of crystallization and amorphization., IEEE Trans. Electron Devices 55 (7), 1672-1681 (2008). 10.1109/TED.2008.923740
43. I. V. Karpov, M. Mitra, D. Kau, G. Spadini, Y. A. Kryukov, and V. G. Karpov, Fundamental drift of parameters in chalcogenide based phase change memory., J. Appl. Phys. 102 (12), 124503 (2007). 10.1063/1.2825650
44. D. Ielmini, S. Lavizzari, D. Sharma, and A. L. Lacaita, Physical interpretation, modeling and impact on phase change memory (PCM) reliability of resistance drift due to chalcogenide structural relaxation., in IEEE International Electron Devices Meeting (IEDM) (IEEE, 2007), pp. 939-942.
45. H. Markram, W. Gerstner, and P. J. Sjöström, A history of spike-timing-dependent plasticity., Front. Synaptic Neurosci. 3, 4 (2011). 10.3389/fnsyn.2011.00004
46. G. Indiveri, Front. Neurosci. 5, 73 (2011). 10.3389/fnins.2011.00073
47. P. Lichtsteiner, A 128 × 128 120 dB 15 μs Latency Asynchronous Temporal Contrast Vision Sensor., IEEE J. Solid-State Circuits, 43, 566-576 (2008). 10.1109/JSSC.2007.914337
48. D. Kuzum, R. Jeyasingh, and H.-S. P. Wong, Energy efficient programming of nanoelectronic synaptic devices for large-scale implementation of associative and temporal sequence learning., in IEEE International Electron Devices Meeting (IEDM) (IEEE, 2011), pp. 30.3.1-30.3.4.
49. G. Snider, Spike-timing-dependent learning in memristive nanodevices., in IEEE International Symposium on Nanoscale Architectures, NANOARCH (IEEE, 2008), pp. 85-92.
50. M. Suri, O. Bichler, Q. Hubert, L. Perniola, V. Sousa, C. Jahan, D. Vuillaume, C. Gamrat, and B. DeSalvo, Interface engineering of PCM for improved synaptic performance in neuromorphic systems., in IEEE International Memory Workshop (IMW), 2012.