Advanced design techniques to support next generation backplane links beyond 10Gbps

International Engineering Consortium - DesignCon 2007

Volumn 2, Issue , 2007, Pages 1083-1105

  Cartier, Marc ^a   Chan, Jason ^a   Cohen, Tom ^a   Kirk, Brian ^a  

^a Amphenol TCS ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

10 GBPS; ADVANCED DESIGNS; BACKPLANES; FIBRE CHANNEL; IN-LINE; MARKET REQUIREMENTS; MODE CONVERSIONS; PLUG-INS; SYSTEM DESIGNERS; UPGRADE PATH;

ENGINEERING; INDUSTRIAL ENGINEERING;

DESIGN;

EID: 84866352203     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Marc Cartier, Tom Cohen and Brian Kirk, "Optimized Signal Path for Orthogonal System Architectures," 6-TA4, High-Performance Backplane System Design, DesignCon2005, Santa Clara, CA, USA.
2. Ravi Kollipara, Ben Chia, Frank Lambrecht, Chuck Yuan, Jared Zerbe, Gautam Patel, Tom Cohen and Brian Kirk, "Practical Design Considerations for 10 to 25 Gbps Copper Backplane Serial Links," 8-WP1, High-Performance Backplane System Design, DesignCon2006, Santa Clara, CA, USA.
3. T. Cohen, "Practical Guidelines for the Implementation of Back Drilling Plated Through Hole Vias in Multi-gigabit Board Applications," DesignCon 2003, Santa Clara, California, January 2003.
4. Ravi Kollipara, Ben Chia, Qi Lin and Jared Zerbe, "Impact of Manufacturing Parametric Variations on Backplane System Performance," 6-WA2, High-Performance Backplane System Design, DesignCon2005, Santa Clara, CA, USA.
5. Granzow, Kenneth D., Digital Transmission Lines: Computer Modeling and Analysis. New York: Oxford University Press, 1998.
6. "Keep Those Signals Straight: The Importance of Skew, or Timing is Everything", IEEE-EMCS-DL, 2002.