FPGA implementation of Spiking Neural Networks

IFAC Proceedings Volumes (IFAC-PapersOnline)

Volumn 45, Issue 4, 2012, Pages 139-144

  Rosado Munoz A ^a   Bataller Mompean M ^a   Guerrero Martinez J ^a  

^a UNIVERSITY OF VALENCIA   (Spain)

Author keywords

FPGA; Hardware synthesis; Neural network models; Spiking neural network; VHDL

Indexed keywords

COMPUTATION THEORY; COMPUTER CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTELLIGENT AGENTS; NEURAL NETWORKS; PATTERN RECOGNITION; WIRELESS TELECOMMUNICATION SYSTEMS;

BIOLOGICAL NEURAL SYSTEMS; HARDWARE IMPLEMENTATIONS; HARDWARE SYNTHESIS; NEURAL NETWORK MODEL; PATTERN RECOGNITION PROBLEMS; SPIKE RESPONSE MODELS; SPIKING NEURAL NETWORK(SNN); SPIKING NEURAL NETWORKS;

EMBEDDED SYSTEMS;

EID: 84866075239     PISSN: 14746670     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.3182/20120403-3-DE-3010.00074     Document Type: Conference Paper

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