-
1
-
-
27544481926
-
Variability in architectural simulation of multi-threaded workloads
-
Alameldeen et al. Variability in architectural simulation of multi-threaded workloads. In Proc. of HPCA, February 2003.
-
Proc. of HPCA, February 2003
-
-
Alameldeen1
-
2
-
-
0348011359
-
Dynamically tuning processor resources with adaptive processing
-
Albonesi et al. Dynamically tuning processor resources with adaptive processing. IEEE Computer, 36(2):49-58, 2003.
-
(2003)
IEEE Computer
, vol.36
, Issue.2
, pp. 49-58
-
-
Albonesi1
-
3
-
-
0033719421
-
Wattch: A framework for architecture-level power analysis and optimization
-
Brooks et al. Wattch: A framework for architecture-level power analysis and optimization. Proc. of 27th ISCA, 2000.
-
Proc. of 27th ISCA, 2000
-
-
Brooks1
-
5
-
-
75649145360
-
Technologies for ultradynamic voltage scaling
-
Chandrakasan et al. Technologies for ultradynamic voltage scaling. In Proc. of the IEEE, 2010.
-
Proc. of the IEEE, 2010
-
-
Chandrakasan1
-
6
-
-
75649093754
-
Near-threshold computing: Reclaiming Moore's Law through energy efficient integrated circuits
-
Dreslinski et al. Near-threshold computing: reclaiming Moore's Law through energy efficient integrated circuits. Proc. of the IEEE, 2010.
-
Proc. of the IEEE, 2010
-
-
Dreslinski1
-
7
-
-
34547170455
-
Drowsy caches: Simple techniques for reducing leakage power
-
Flautner et al. Drowsy caches: simple techniques for reducing leakage power. In Proc. of the 29th ISCA, 2002.
-
Proc. of the 29th ISCA, 2002
-
-
Flautner1
-
8
-
-
2342591856
-
The Intel Pentium M processor: Microarchitecture and performance
-
Gochman et al. The Intel Pentium M processor: microarchitecture and performance. Intel Tech. J., 2003.
-
(2003)
Intel Tech. J.
-
-
Gochman1
-
9
-
-
36849034066
-
SPEC CPU2006 Benchmark Descriptions
-
Henning. SPEC CPU2006 Benchmark Descriptions. Computer Architecture News, 2006.
-
(2006)
Computer Architecture News
-
-
Henning1
-
10
-
-
35348921111
-
Core fusion: Accommodating software diversity in chip multiprocessors
-
Ipek et al. Core fusion: accommodating software diversity in chip multiprocessors. In Proc. of the 34th ISCA, 2007.
-
Proc. of the 34th ISCA, 2007
-
-
Ipek1
-
11
-
-
77951194761
-
Power7: IBM's next-generation server processor
-
Kalla et al. Power7: IBM's next-generation server processor. IEEE Micro, 2010.
-
(2010)
IEEE Micro
-
-
Kalla1
-
12
-
-
85043453489
-
Single-ISA heterogeneous multi-core architectures: The potential for processor power reduction
-
Kumar et al. Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction. In Proc. of the 36th Symp. on Microarchitecture, 2003.
-
Proc. of the 36th Symp. on Microarchitecture, 2003
-
-
Kumar1
-
13
-
-
0036469676
-
Simics: A full system simulation platform
-
Magnusson et al. Simics: A full system simulation platform. IEEE Computer, 2002.
-
(2002)
IEEE Computer
-
-
Magnusson1
-
14
-
-
1542296944
-
Pipeline gating: Speculation control for energy reduction
-
Manne et al. Pipeline gating: speculation control for energy reduction. In Proc. of the 25th ISCA, 1998.
-
Proc. of the 25th ISCA, 1998
-
-
Manne1
-
15
-
-
33748870886
-
Multifacet's general execution-driven multiprocessor simulator (GEMS)
-
Martin et al. Multifacet's general execution-driven multiprocessor simulator (GEMS). Comp. Arch. News, 2005.
-
(2005)
Comp. Arch. News
-
-
Martin1
-
16
-
-
1542359133
-
Checkpointing alternatives for high performance, power-aware processors
-
Moshovos. Checkpointing alternatives for high performance, power-aware processors. In Proc. of ISLPED 2003.
-
Proc. of ISLPED 2003
-
-
Moshovos1
-
17
-
-
34548119036
-
Power and thermal management in the Intel Core Duo processor
-
Naveh et al. Power and thermal management in the Intel Core Duo processor. Intel Technology Journal. 2006.
-
(2006)
Intel Technology Journal
-
-
Naveh1
-
18
-
-
84865573456
-
The Core-C6 (CC6) Sleep State of the AMD Bobcat x86 Microprocessor
-
Rogers et al. The Core-C6 (CC6) Sleep State of the AMD Bobcat x86 Microprocessor. In Proc. of ISLPED, 2012.
-
Proc. of ISLPED, 2012
-
-
Rogers1
-
19
-
-
33646372742
-
A case for (partially) Tagged Geometric history length branch prediction
-
Seznec et al. A case for (partially) Tagged Geometric history length branch prediction. J. of Instr. Level Parallelism, 2006.
-
(2006)
J. of Instr. Level Parallelism
-
-
Seznec1
-
20
-
-
84859091882
-
-
Technical Report HPL-2008-20, Hewlett Packard Labs
-
Shyamkumar et al. CACTI 5.1. Technical Report HPL-2008-20, Hewlett Packard Labs, 2008.
-
(2008)
CACTI 5.1
-
-
Shyamkumar1
-
21
-
-
84865567842
-
Offline phase analysis and optimization for multi-configuration processors
-
Vandeputte et al. Offline phase analysis and optimization for multi-configuration processors. Architectures, Modeling, and Simulation, 2005.
-
(2005)
Architectures, Modeling, and Simulation
-
-
Vandeputte1
|