Setting an error detection infrastructure with low cost acoustic wave detectors

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2012, Pages 333-343

  Upasani, Gaurang ^a   Vera, Xavier ^b   González, Antonio ^a,b  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSOR; DETECTION MECHANISM; ERROR CODES; LOW COSTS; MEMORY ARRAY; OPERATING VOLTAGE; SOFT ERROR; WAVE DETECTORS;

ACOUSTICS; COMPUTER ARCHITECTURE; MICROPROCESSOR CHIPS;

ACOUSTIC WAVES;

EID: 84864862268     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2012.6237029     Document Type: Conference Paper

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