Petri net modeling and wafer sojourn time analysis of single-arm cluster tools with residency time constraints and activity time variation

IEEE Transactions on Semiconductor Manufacturing

Volumn 25, Issue 3, 2012, Pages 432-446

  Qiao, Yan ^a   Wu, Nai Qi ^a   Zhou, Meng Chu ^b,c  

^a GUANGDONG UNIVERSITY OF TECHNOLOGY   (China)

^b NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

^c Department of Computer Science and Technology   (China)

Author keywords

Cluster tools; Petri net (PN); scheduling; semiconductor manufacturing

Indexed keywords

ACTIVITY TIME; ANALYTICAL EXPRESSIONS; CLUSTER TOOL; FABRICATION PROCESS; FEASIBLE SCHEDULE; PETRI-NET MODELING; PROCESSING MODULES; RESEARCH RESULTS; SEMI-CONDUCTOR FABRICATION; SEMICONDUCTOR MANUFACTURING; SOJOURN TIME; TIME CONSTRAINTS; UPPER BOUND; WAFER FABRICATIONS;

FABRICATION; PETRI NETS; REAL TIME CONTROL; SCHEDULING; SEMICONDUCTOR DEVICE MANUFACTURE; TOOLS;

SILICON WAFERS;

EID: 84864687325     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2012.2199338     Document Type: Article

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