Optimal data placement for memory architectures with scratch-pad memories

Proc. 10th IEEE Int. Conf. on Trust, Security and Privacy in Computing and Communications, TrustCom 2011, 8th IEEE Int. Conf. on Embedded Software and Systems, ICESS 2011, 6th Int. Conf. on FCST 2011

Volumn , Issue , 2011, Pages 1045-1050

  Guo, Yibo ^b   Zhuge, Qingfeng ^a   Hu, Jingtong ^b   Sha, Edwin H M ^a,b  

^a HUNAN UNIVERSITY   (China)

^b The University of Texas at Dallas   (United States)

Author keywords

Data placement; Embedded System; Scratch Pad Memory

Indexed keywords

DATA PLACEMENT; DIGITAL SIGNAL PROCESSOR SYSTEMS; ENERGY COST; GREEDY ALGORITHMS; LOW COSTS; MEMORY ACCESS; MEMORY UNITS; OPTIMAL DATA; POLYNOMIAL-TIME; RANDOM DATA; SCRATCH PAD MEMORY; TIME COST;

ALGORITHMS; CODE CONVERTERS; COSTS; DIGITAL SIGNAL PROCESSORS; EMBEDDED SOFTWARE; EMBEDDED SYSTEMS; OPTIMIZATION; POLYNOMIAL APPROXIMATION; RANDOM ACCESS STORAGE; SIGNAL PROCESSING;

MEMORY ARCHITECTURE;

EID: 84862928342     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TrustCom.2011.143     Document Type: Conference Paper

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