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Volumn , Issue , 2003, Pages 7-8

Hardware/software co-configuration for multiprocessor SoPC (work-in-progress report)

Author keywords

Application software; Computer architecture; Embedded system; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Memory management; Multiprocessing systems; Operating systems; Real time systems

Indexed keywords

APPLICATION PROGRAMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; INTEGRATED CIRCUIT INTERCONNECTS; INTERACTIVE COMPUTER SYSTEMS; MULTIPROCESSING SYSTEMS; REAL TIME SYSTEMS; SCHEDULING;

EID: 84862927152     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/WSTFES.2003.1201350     Document Type: Conference Paper
Times cited : (6)

References (5)
  • 2
    • 0031354377 scopus 로고    scopus 로고
    • A novel approach to multiprogrammed multiprocessor synchronization for real-time kernels
    • Dec
    • H. Takada and K. Sakamura, "A novel approach to multiprogrammed multiprocessor synchronization for real-time kernels," in Proc. Real-Time Systems Symposium, pp. 134-143, Dec. 1997.
    • (1997) Proc. Real-Time Systems Symposium , pp. 134-143
    • Takada, H.1    Sakamura, K.2
  • 3
    • 84942141687 scopus 로고    scopus 로고
    • http://www.xilinx.com/ise/embedded/edk.htm
  • 4
    • 84942141688 scopus 로고    scopus 로고
    • http://www.ertl.jp/TOPPERS/
  • 5
    • 27544477354 scopus 로고    scopus 로고
    • TRON Association, (both Japanese and English versions available)
    • H. Takada, ed., μITRON4.0 Specification. TRON Association, 1999. (both Japanese and English versions available).
    • (1999) μITRON4.0 Specification
    • Takada, H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.