Compressed sensing and Cholesky decomposition on FPGAs and GPUs

Parallel Computing

Volumn 38, Issue 8, 2012, Pages 421-437

  Yang, Depeng ^a   Peterson, Gregory D ^a   Li, Husheng ^a  

^a UNIVERSITY OF TENNESSEE   (United States)

Author keywords

Application acceleration; Cholesky decomposition; Compressed sensing; FPGA; GPGPU

Indexed keywords

CHOLESKY; CHOLESKY DECOMPOSITION; COMPRESSIVE SENSING; COMPUTATION STEPS; FAST SIGNAL; FPGA IMPLEMENTATIONS; GPGPU; GPU IMPLEMENTATION; LINEAR EQUATION SYSTEM; MEMORY ACCESS; MODERN APPLICATIONS; NYQUIST SAMPLING RATE; PIPELINED HARDWARE; RECONSTRUCTION ALGORITHMS; REDUCED DATA; SIGNAL ACQUISITIONS;

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PROGRAM PROCESSORS; SIGNAL ANALYSIS; SIGNAL RECONSTRUCTION;

DYNAMICS;

EID: 84862647640     PISSN: 01678191     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.parco.2012.03.001     Document Type: Article

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