Constructive Boolean circuits and the exactness of timed ternary simulation

Formal Methods in System Design

Volumn 40, Issue 3, 2012, Pages 283-329

  Mendler, Michael ^a   Shiple, Thomas R ^b   Berry, Gérard ^c  

^a UNIVERSITY OF BAMBERG   (Germany)

^b SYNOPSYS INC   (United States)

^c INRIA   (France)

Author keywords

Combinational circuits; Constructive logic; Delay models; Ternary simulation

Indexed keywords

ABSTRACT SIMULATION; ASYNCHRONOUS BEHAVIOR; AXIOMATIC SPECIFICATIONS; BOOLEAN CIRCUIT; COMBINATIONAL CYCLES; COMPOSITIONALITY; CONSTRUCTIVE LOGIC; CYCLIC CIRCUITS; DELAY MODELS; GATE-LEVEL CIRCUITS; METASTABILITIES; NON-DETERMINISM; PHYSICAL MECHANISM; REAL TIME EXECUTION; STABILIZATION BEHAVIOR; SYMBOLIC SIMULATION; TERNARY SIMULATION; THREE-VALUED; TIMING ANALYSIS;

ALGORITHMS; ASYNCHRONOUS SEQUENTIAL LOGIC; COMBINATORIAL CIRCUITS; COMPUTER HARDWARE; DELAY CIRCUITS; SPECIFICATION LANGUAGES; STABILIZATION;

COMPUTER SIMULATION;

EID: 84862140339     PISSN: 09259856     EISSN: None     Source Type: Journal    
DOI: 10.1007/s10703-012-0144-6     Document Type: Article

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