Fast and lightweight support for nested parallelism on cluster-based embedded many-cores

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2012, Pages 104-110

  Marongiu, Andrea ^a   Burgio, Paolo ^a   Benini, Luca ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING; MEMORY ARCHITECTURE; NETWORK-ON-CHIP;

FINE-GRAINED PARALLELISM; INTERCONNECTION SYSTEMS; MANY-CORE ACCELERATORS; MEMORY OPERATIONS; NESTED PARALLELISM; NETWORK-ON-CHIP(NOC); PARALLELIZATIONS; PROGRAMMING ABSTRACTIONS;

DISTRIBUTED COMPUTER SYSTEMS;

EID: 84862082622     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2012.6176441     Document Type: Conference Paper

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