메뉴 건너뛰기




Volumn , Issue , 2012, Pages 582-585

Online scheduling for multi-core shared reconfigurable fabric

Author keywords

[No Author keywords available]

Indexed keywords

CUSTOM INSTRUCTION; EMBEDDED APPLICATION; EXPERIMENTAL EVALUATION; MULTI CORE; ON CHIPS; ONLINE SCHEDULING; ONLINE SCHEDULING ALGORITHM; RECONFIGURABLE FABRICS; RECONFIGURABLE LOGIC; RUN-TIME SCHEDULING; TIME-TO-MARKET;

EID: 84862062619     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (17)

References (14)
  • 1
    • 77951604108 scopus 로고    scopus 로고
    • Combining multicore and reconfigurable instruction set extensions
    • Z. Chen, R. N. Pittman, and A. Forin, "Combining multicore and reconfigurable instruction set extensions," in FPGA, 2010.
    • (2010) FPGA
    • Chen, Z.1    Pittman, R.N.2    Forin, A.3
  • 2
    • 79951712762 scopus 로고    scopus 로고
    • ReMAP: A reconfigurable heterogeneous multicore architecture
    • M. Watkins and D. Albonesi, "ReMAP: A reconfigurable heterogeneous multicore architecture," in MICRO, 2010.
    • (2010) MICRO
    • Watkins, M.1    Albonesi, D.2
  • 3
    • 63049087001 scopus 로고    scopus 로고
    • Kernel sharing on reconfigurable multiprocessor systems
    • P. Garcia and K. Compton, "Kernel sharing on reconfigurable multiprocessor systems," in FPT, 2008.
    • (2008) FPT
    • Garcia, P.1    Compton, K.2
  • 4
    • 80052654616 scopus 로고    scopus 로고
    • Shared Reconfigurable Fabric for Multi-core Customization
    • L. Chen and T. Mitra, "Shared Reconfigurable Fabric for Multi-core Customization," in DAC, 2011.
    • (2011) DAC
    • Chen, L.1    Mitra, T.2
  • 5
    • 79957549283 scopus 로고    scopus 로고
    • Minority-Game-based Resource Allocation for Run-Time Reconfigurable Multi-core Processors
    • M. Shafiue, L. Bauer, W. Ahmed, and H. Jorg, "Minority-Game-based Resource Allocation for Run-Time Reconfigurable Multi-core Processors," in DATE, 2011.
    • (2011) DATE
    • Shafiue, M.1    Bauer, L.2    Ahmed, W.3    Jorg, H.4
  • 6
    • 0346935131 scopus 로고    scopus 로고
    • Multiprocessor EDF and Deadline Monotonic Schedulability Analysis
    • T. P. Baker, "Multiprocessor EDF and Deadline Monotonic Schedulability Analysis," in RTSS, 2003.
    • (2003) RTSS
    • Baker, T.P.1
  • 7
    • 83455228773 scopus 로고    scopus 로고
    • Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Network-on-Chip
    • P. Mahr, S. Christgau, C. Haubelt, and C. Bobda, "Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Network-on-Chip," in IPDPS, 2011.
    • (2011) IPDPS
    • Mahr, P.1    Christgau, S.2    Haubelt, C.3    Bobda, C.4
  • 8
    • 33746042571 scopus 로고    scopus 로고
    • An EDF schedulability test for periodic tasks on reconfigurable hardware devices
    • K. Danne and M. Platzner, "An EDF schedulability test for periodic tasks on reconfigurable hardware devices," in LCTES, 2006.
    • (2006) LCTES
    • Danne, K.1    Platzner, M.2
  • 9
    • 33746039062 scopus 로고    scopus 로고
    • A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware
    • -, "A heuristic approach to schedule periodic real-time tasks on reconfigurable hardware," in FPL, 2005.
    • (2005) FPL
    • Danne, K.1    Platzner, M.2
  • 10
    • 49749108535 scopus 로고    scopus 로고
    • An efficient algorithm for free resources management on the FPGA
    • Y. Lu, T. Marconi, G. Gaydadjiev, and K. Bertels, "An efficient algorithm for free resources management on the FPGA," in DATE, 2008.
    • (2008) DATE
    • Lu, Y.1    Marconi, T.2    Gaydadjiev, G.3    Bertels, K.4
  • 11
    • 0034156490 scopus 로고    scopus 로고
    • The Three-Dimensional Bin Packing Problem
    • S. Martello, D. Pisinger, and D. Vigo, "The Three-Dimensional Bin Packing Problem," Operations Research, vol. 48, no. 2, 2000.
    • (2000) Operations Research , vol.48 , Issue.2
    • Martello, S.1    Pisinger, D.2    Vigo, D.3
  • 13
    • 33750401589 scopus 로고    scopus 로고
    • A software-configurable processor architecture
    • R. E. Gonzalez, "A software-configurable processor architecture," IEEE Micro, vol. 26, no. 5, 2006.
    • (2006) IEEE Micro , vol.26 , Issue.5
    • Gonzalez, R.E.1
  • 14
    • 52349114098 scopus 로고    scopus 로고
    • Design and architectural exploration of expression-grained reconfigurable arrays
    • G. Ansaloni, P. Bonzini, and L. Pozzi, "Design and architectural exploration of expression-grained reconfigurable arrays," in SASP, 2008.
    • (2008) SASP
    • Ansaloni, G.1    Bonzini, P.2    Pozzi, L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.