Design and analysis of a class-D stage with harmonic suppression

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 59, Issue 6, 2012, Pages 1178-1186

  Fritzin, Jonas ^a   Svensson, Christer ^a   Alvandpour, Atila ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

CMOS; harmonic rejection; Radio transmitter

Indexed keywords

CMOS INTEGRATED CIRCUITS; EFFICIENCY; ELECTRIC INVERTERS; OPTICAL RESONATORS; RADIO TRANSMISSION; RADIO TRANSMITTERS;

BUFFER REQUIREMENTS; CLASS D INVERTER; DESIGN AND ANALYSIS; DRAIN EFFICIENCY; HARMONIC REJECTION; HARMONIC SUPPRESSION; POWER-ADDED EFFICIENCY; RISE AND FALL TIME;

HARMONIC ANALYSIS;

EID: 84861905319     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2011.2173389     Document Type: Article

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