System-level design space exploration for security processor prototyping in analytical approaches

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 1, Issue , 2005, Pages 376-380

  Lin, Yung Chia ^a   Huang, Chung Wen ^a   Lee, Jenq Kuen ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS; HARDWARE SECURITY; INTEGRATED CIRCUIT DESIGN; SYSTEMS ANALYSIS;

ANALYTICAL APPROACH; AVERAGE PREDICTION ERROR; CYCLE-ACCURATE SIMULATION; DESIGN SPACE EXPLORATION; ORDERS OF MAGNITUDE; SCALABILITY ISSUE; SECURITY PROCESSOR; SYSTEM LEVEL DESIGN;

ANALYTICAL MODELS;

EID: 84861427597     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120873     Document Type: Conference Paper

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